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MC145406N,602

Description
IC DRIVER/RECEIVER TRIPLE 16-DIP
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size50KB,5 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric View All

MC145406N,602 Overview

IC DRIVER/RECEIVER TRIPLE 16-DIP

MC145406N,602 Parametric

Parameter NameAttribute value
Brand NameNXP Semiconductor
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeDIP
package instructionPLASTIC, DIP-16
Contacts16
Manufacturer packaging codeSOT38-4
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
Differential outputNO
Number of drives3
High level input current maximum value0.000001 A
Input propertiesSCHMITT TRIGGER
Interface integrated circuit typeLINE TRANSCEIVER
Interface standardsEIA-232-D; V.28
JESD-30 codeR-PDIP-T16
JESD-609 codee4
length19.025 mm
Nominal negative supply voltage-12 V
Number of functions3
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristicsTOTEM-POLE
Maximum output low current0.004 A
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5,+-5/+-12 V
Certification statusNot Qualified
Maximum receive delay425 ns
Number of receiver bits3
Maximum seat height4.2 mm
Maximum slew rate0.6 mA
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
Supply voltage 1-max13.2 V
Mains voltage 1-minute4.5 V
Supply voltage1-Nom12 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
maximum transmission delay500 ns
width7.62 mm
Base Number Matches1
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
DESCRIPTION
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers
and 3 receivers to fulfill the electrical specifications of standards
EIA-232-D and CCITT V.28. The drivers feature true TTL input
compatibility, slew-rate limited output, 300
power-off source
impedance, and output typically switching to within 25% of the
supply rails. The receivers can handle up to +25V while presenting
3 to 7kΩ impedance. Hysteresis in the receiver aids reception of
noisy signals. By combining both drivers and receivers in a single
CMOS chip, the MC145406 provides efficient, low-power solutions
for EIA-232-D and V.28 applications.
PIN CONFIGURATION
D and N Packages
V
DD
RX
1
TX
1
RX
2
TX
2
RX
3
TX
3
1
2
3
4
5
6
7
8
R
D
R
D
R
D
16
15
14
13
12
11
10
9
V
CC
DO1
DI1
DO2
DI2
DO3
DI3
GND
APPLICATIONS
Modem interface
Voice/data telephone interface
Lap-top computers
UART interface
FEATURES
V
SS
NOTE:
D = Driver
R = Receiver
Drivers
+5 to +12V supply range
300Ω power-off source impedance
Output current limiting
TTL compatible
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Dual In-Line (DIP) Package
16-Pin Small Outline Large (SOL) Package
Maximum slew rate = 30V/µs
Receivers
+25V input voltage range over the full supply range
3 to 7kΩ input impedance
Hysteresis on input switchpoint
General
Very low supply currents for long battery life
Operation is independent of power supply sequencing
TEMPERATURE RANGE
0 to +70
°
C
0 to +70
°
C
ORDER CODE
MC145406N
MC145406D
DWG #
0406C
0171B
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
DD
V
SS
V
IR
Supply voltage
Supply voltage
Supply voltage
Input voltage range
RX
1-3
inputs
DI
1-3
inputs
DC current per pin
P
D
T
A
T
STG
θ
JA
PARAMETER
RATING
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
(V
SS
- 15) to (V
DD
+ 15)
-0.5 to (V
CC
+ 0.5)
+100
1.0
0 to +70
-65 to +150
80
105
UNITS
V
V
V
V
mA
W
Power dissipation (package)
Operating temperature range
Storage temperature range
Thermal impedance
N package
D package
°
C
°
C
°
C/W
NOTE:
This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < V
DI
< V
DD
and GND < V
DO
< V
CC
. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to V
SS
< V
TX1-3
< V
DD
. Unused inputs
must always be tied to an appropriate logic voltage level (e.g., GND or V
CC
for DI, and V
SS
or V
DD
for RX).
August 31, 1994
467
853-1430 13721
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