Philips Semiconductors
Product specification
IF amplifier/demodulator for FM radio receivers
FEATURES
•
Balanced limiting amplifier
•
Balanced coincidence demodulator
•
Two open-collector stop pulse outputs for
microcomputer tuning control
•
Simulated behaviour of ratio detector (internal field
strength and detuning dependent voltage for dynamic
AF signal muting)
•
Mono/stereo blend field strength indication control
voltage
•
AFC output
•
3-state mode switch for FM-MUTE-ON, FM-MUTE-OFF
and FM-OFF
•
Internal compensation of AF signal Total Harmonic
Distortion (THD)
•
Built-in hum and ripple rejection circuits.
QUICK REFERENCE DATA
SYMBOL
V
P
I
P
V
iIF(rms)
V
oAF(rms)
S/N
THD
PARAMETER
supply voltage
supply current (l
2
= I
7
= 0)
IF input sensitivity for limiting on pin 20
(RMS value)
AF output signal on pin 4 (RMS value)
signal-to-noise ratio
total harmonic distortion
f
m
= 400 Hz;
∆f
=
±75
kHz
f
m
= 1 kHz;
∆f
=
±75
kHz
K2 adjustment and
FM-MUTE-OFF
T
amb
operating ambient temperature
CONDITIONS
−
14
180
−
−
−
−40
MIN.
7.5
TYP.
8.5
20
22
200
82
0.1
0.07
−
GENERAL DESCRIPTION
TDA1597
The TDA1597 provides IF amplification, symmetrical
quadrature demodulation and level detection for quality
home and car FM radio receivers and is suitable for mono
and stereo reception. It may also be applied to common
front-ends, stereo decoders and AM receivers circuits.
All pin numbers mentioned in this data sheet refer to the
SO version (TDA1597T) unless otherwise specified.
MAX.
12
26
35
220
−
0.3
0.25
+85
UNIT
V
mA
µV
mV
dB
%
%
°C
ORDERING INFORMATION
TYPE
NUMBER
TDA1597
TDA1597T
PACKAGE
NAME
DIP18
SO20
DESCRIPTION
plastic dual in-line package; 18 leads (300 mil)
plastic small outline package; 20 leads; body width 7.5 mm
VERSION
SOT102-1
SOT163-1
1997 Feb 27
2
Philips Semiconductors
Product specification
IF amplifier/demodulator for FM radio receivers
FUNCTIONAL DESCRIPTION
The limiter amplifier has five stages of IF amplification
using balanced differential limiter amplifiers with emitter
follower coupling.
Decoupling of the stages from the supply voltage line and
an internal high-ohmic DC feedback loop gives a very
stable IF performance. The amplifier gain is virtually
independent of changes in temperature.
The FM demodulator is fully balanced and contains two
cross-coupled differential amplifiers.
The quadrature detection of the FM signal is performed by
direct feeding of one differential amplifier from the limiter
amplifier output and the other via an external 90 degrees
phase shifting network. The demodulator has a good
stability and a small zero cross-over shift. The bandwidth
of the demodulator output is restricted by an internal
low-pass filter to approximately 1 MHz. Non-linearities,
which are introduced by demodulation, are compensated
for by the THD compensation circuit. For this reason, the
demodulator resonance circuit (between pins 10 and 11)
must have a loaded Q-factor of 19.
TDA1597
Consequently, there is no need for the demodulator tuned
circuit to be adjusted for minimum distortion. Adjustment
criterion is a symmetrical stop pulse. The control voltage
for the mute attenuator (pin 16) is derived from the values
of the level detector and the detuning detector output
signals. The mute attenuator has a fast attack and a slow
decay, determined by the capacitor connected to pin 16.
The AF signal is fed via the mute attenuator to the output
(pin 4). A weighted control voltage (pin 6) is obtained from
the mute attenuator control voltage via a buffer amplifier
that introduces an additional voltage shift and gain.
The level detector generates a voltage output signal
proportional to the amplitude of the input signal.
The unweighted level detector output signal is available in
the FM-MUTE-ON condition (mode switch).
The open-collector tuning stop output voltages STOP-0
and STOP-1 (pins 15 and 14) are derived from the
detuning and the input signal level. Pins 14 and 15 may be
tied together if only one tuning-stop output is required.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
P
V
n
PARAMETER
supply voltage
voltage at pins 2, 4, 5, 6, 10, 11 and 16
voltage at pins 3, 7, 8, 14, 15, 18,
19 and 20
V
13
I
14, 15
P
tot
T
stg
T
amb
V
es
voltage on pin 13
current at pins 14 and 15
total power dissipation
storage temperature
operating ambient temperature
electrostatic handling
all pins except pins 5 and 7
pin 5
pin 7
Note
1. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
note 1
note 1
note 1
−2000
−2000
−2000
+2000
+800
+1000
V
V
V
CONDITIONS
MIN.
−0.3
−0.3
−0.3
−
−
−
−55
−40
MAX.
+13
+10
V
P
6
2
360
+150
+85
V
V
V
V
mA
mW
°C
°C
UNIT
1997 Feb 27
5
Embedded System
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