Changes to Endnote 3 ...................................................................... 4
Changes to Pin Configuration Section .......................................... 8
Changes to Evaluating the AD7679’s Performance Section...... 25
Changes to Ordering Guide .......................................................... 26
7/03—Revision 0: Initial Version
Rev. A | Page 2 of 28
AD7679
SPECIFICATIONS
–40°C to +85°C, V
REF
= 4.096 V, AVDD = DVDD= 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.
Table 2.
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Operating Input Voltage
Analog Input CMRR
Input Current
Input Impedance
1
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise
Zero Error, T
MIN
to T
MAX
Zero Error Temperature Drift
Gain Error, T
MIN
to T
MAX 3
Gain Error Temperature Drift
Power Supply Sensitivity
AC ACCURACY
Signal-to-Noise
Conditions
Min
18
–V
REF
–0.1
68
25
Typ
Max
Unit
Bits
V
V
dB
μA
V
IN+
– V
IN–
V
IN+
, V
IN–
to AGND
f
IN
= 100 kHz
570 kSPS Throughput
+V
REF
AVDD+0.1
0
–2.5
–1
18
V
REF
= 5 V
–40
–0.048
AVDD = 5 V ± 5%
f
IN
= 2 kHz, V
REF
= 5 V
V
REF
= 4.096 V
f
IN
= 10 kHz, V
REF
= 4.096 V
f
IN
= 100 kHz, V
REF
= 4.096 V
V
IN+
= V
IN–
= V
REF
/2 = 2.5 V
f
IN
= 2 kHz
f
IN
= 10 kHz
f
IN
= 100 kHz
f
IN
= 2 kHz
f
IN
= 10 kHz
f
IN
= 100 kHz
f
IN
= 2 kHz, V
REF
= 4.096 V
f
IN
= 2 kHz, –60 dB Input
±0.5
See Note 3
±1.6
±4
101
99
98
97
103
120
118
105
–115
–113
–98
98
40
26
2
5
Full-Scale Step
0.7
1.75
570
+2.5
+1.75
μs
kSPS
LSB
2
LSB
Bits
LSB
LSB
ppm/°C
% of FSR
ppm/°C
LSB
dB
4
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
MHz
ns
ps rms
ns
ns
V
V
V
μA
μA
+40
+0.048
97.5
Dynamic Range
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise + Distortion)
–3 dB Input Bandwidth
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery
REFERENCE
External Reference Voltage Range
REF Voltage with Reference Buffer
Reference Buffer Input Voltage Range
REFBUFIN Input Current
REF Current Drain
250
250
3
4.05
1.8
–1
4.096
4.096
2.5
235
AVDD + 0.1
4.15
2.6
+1
REF
REFBUFIN = 2.5 V
REFBUFIN
570 kSPS Throughput
Rev. A | Page 3 of 28
AD7679
Parameter
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
5
Pipeline Delay
6
V
OL
V
OH
POWER SUPPLIES
Specified Performance
AVDD
DVDD
OVDD
Operating Current
AVDD
DVDD
8
OVDD
8
POWER DISSIPATION
8
Conditions
Min
Typ
Max
Unit
–0.3
2.0
–1
–1
+0.8
DVDD + 0.3
+1
+1
V
V
μA
μA
ISINK = 1.6 mA
ISOURCE = –500 μA
0.4
OVDD – 0.6
V
V
4.75
4.75
2.7
500 kSPS Throughput
PDBUF High
5
5
5.25
5.25
DVDD + 0.3
7
V
V
V
mA
mA
μA
mW
μW
mW
°C
PDBUF High @ 500 kSPS
PDBUF High @ 1 kSPS
PDBUF Low @ 500 kSPS
TMIN to TMAX
–40
10.8
4.5
50
76
150
89
90
103
+85
TEMPERATURE RANGE
Specified Performance
1
2
9
See Analog Inputs section.
LSB means Least Significant Bit. With the ±4.096 V input range, 1 LSB is 31.25 μV.
3
See Definition of Specifications section. The nominal gain error is not centered at zero and is −0.029% of FSR. This specification is the deviation from this nominal
value. These specifications do not include the error contribution from the external reference, but do include the error contribution from the reference buffer if used.
4
All specifications in dB are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale unless otherwise specified.
5
Parallel or Serial 18-Bit.
6
Conversion results are available immediately after completed conversion.
7
The max should be the minimum of 5.25 V and DVDD + 0.3 V.
8
Tested in Parallel Reading mode.
9
Contact factory for extended temperature range.
Rev. A | Page 4 of 28
AD7679
TIMING SPECIFICATIONS
–40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.
Table 3.
Parameter
Refer to Figure 32 and Figure 33
Convert Pulsewidth
Time between Conversions
CNVST LOW to BUSY HIGH Delay
BUSY HIGH All Modes Except Master Serial Read after Convert
Aperture Delay
End of Conversion to BUSY LOW Delay
Conversion Time
Acquisition Time
RESET Pulsewidth
Refer to Figure 34, Figure 35, and Figure 36 (Parallel Interface Modes)
CNVST LOW to Data Valid Delay
Data Valid to BUSY LOW Delay
Bus Access Request to Data Valid
Bus Relinquish Time
Refer to Figure 38 and Figure 39 (Master Serial Interface Modes)
1
CS LOW to SYNC Valid Delay
CS LOW to Internal SCLK Valid Delay
CS LOW to SDOUT Delay
CNVST LOW to SYNC Delay
SYNC Asserted to SCLK First Edge Delay
2
Internal SCLK Period
2
Internal SCLK HIGH
2
Internal SCLK LOW
2
SDOUT Valid Setup Time
2
SDOUT Valid Hold Time
2
SCLK Last Edge to SYNC Delay
2
CS HIGH to SYNC HI-Z
CS HIGH to Internal SCLK HI-Z
CS HIGH to SDOUT HI-Z
BUSY HIGH in Master Serial Read after Convert
2
CNVST LOW to SYNC Asserted Delay
SYNC Deasserted to BUSY LOW Delay
Refer to Figure 40 and Figure 41 (Slave Serial Interface Modes)
External SCLK Setup Time
External SCLK Active Edge to SDOUT Delay
SDIN Setup Time
SDIN Hold Time
External SCLK Period
External SCLK HIGH
External SCLK LOW
1
2
Symbol
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
14
t
15
t
16
t
17
t
18
t
19
t
20
t
21
t
22
t
23
t
24
t
25
t
26
t
27
t
28
t
29
t
30
t
31
t
32
t
33
t
34
t
35
t
36
t
37
Min
10
1.75
Typ
Max
Unit
ns
μs
ns
μs
ns
ns
μs
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
35
1.5
2
10
1.5
250
10
1.5
20
5
45
15
10
10
10
525
3
25
12
7
4
2
3
40
10
10
10
See Table 4
1.5
25
5
3
5
5
25
10
10
18
In serial interface modes, the SYNC, SCLK, and SDOUT timings are defined with a maximum load C
L
of 10 pF; otherwise, the load is 60 pF maximum.
In Serial Master Read during Convert mode. See Table 4 for Serial Master Read after Convert mode.
This is my first time installing the development environment of wince 5.0. I don't know how to install it. I would like to ask how everyone installed the development environment of wince 5.0. I instal...
I am a software developer and I don't know anything about hardware. Now I want to make a program to access the Internet through GPRS and PPP. If any brother can give me an example or document, I would...
[i=s] This post was last edited by dcexpert on 2014-12-17 14:34 [/i] [b][size=3]X-NUCLEO-IDB04A1 (Nucleo low-power Bluetooth expansion board) information summary [/size][/b] Continuously updated [list...
I just got the official development board of LM4F120, using MDK4.12 and ICDI for DEBUG. Every time I debug, the following picture appears. How can I solve this problem?...
The relationship between RTL-level simulation, gate-level simulation, layout and routing simulation, post-simulation, pre-simulation, functional simulation and timing simulation is not very clear. Can...
Sailing is gaining more and more attention. How to use modern technology to assist training and improve competition results is particularly important. Considering the real-time data collection in t...[Details]
Power management solutions for today's portable application processors are becoming increasingly integrated. Total power consumption, standby and sleep current consumption affect battery size, bill...[Details]
introduction
MEMS is a high-tech that has flourished on the basis of integrated circuit production technology and dedicated micro-electromechanical processing methods. Pressure sensors develop...[Details]
To understand how and why OLED power supply affects display image quality, you must first understand OLED display technology and power supply requirements. This article will explain the latest OLED...[Details]
introduction
Incandescent bulbs can emit a variety of light, but in specific applications, only green, red, and yellow light are usually needed - such as traffic lights. If an incand...[Details]
The power supply is the core component of a computer. Although it is not of high value, all computer components rely on the switching power adapter to provide energy, so the stability of a power su...[Details]
1. Introduction
AS-Interface bus technology is an intelligent network that uses a single cable to connect sensors and actuators to controllers, transmit data, and provide power. It can be used...[Details]
As a type of iron battery, lithium iron phosphate battery (hereinafter referred to as lithium iron battery) has always been widely concerned by industry friends (some people say that lithium iron b...[Details]
In recent years, the development of automotive batteries has become a focus of attention. Compared with other rechargeable batteries, lithium-ion batteries have the advantages of high specific ene...[Details]
Since the implementation of the self-weight toll collection system, the highway administration has not only high requirements for the vehicle axle recognition rate, but also requires a long service li...[Details]
1. Overview
With the development of science and technology, PLC is increasingly used in industrial control. The reliability of PLC control systems directly affects the safe production and economic o...[Details]
The growing development of wireless networks enables them to support various types of services. Therefore, it is necessary to ensure the QoS of various services and improve the system utilization. To ...[Details]
Infineon's ICL8001G adopts a single-stage flyback and PFC controller with quasi-resonant operation mode, with a power factor greater than 98%, LED driver efficiency up to 90%, an operating voltage up ...[Details]
illustrate]
This method has
the characteristics of small
ROM
occupation
and fast operation speed, with a range of
2000
ßà
2099
,
a total of
...[Details]
1 Introduction
At present, with the growing calls for environmental protection and energy conservation, new types of transportation that are pollution-free and have diversified energy configur...[Details]
Embedded System
京公网安备 11010802033920号
EEWORLD
