a
Quad 8-Bit Voltage Out CMOS DAC
Complete with Internal 10 V Reference
DAC8426
offering a 25 ppm/°C temperature coefficient and 5 mA of exter-
nal load driving capability.
The DAC8426 contains four 8-bit voltage-output CMOS D/A
converters on a single chip. A 10 V output bandgap reference
sets the output full-scale voltage. The circuit also includes four
input latches and interface control logic.
One of the four latches, selected by the address inputs, is loaded
from the 8-bit data bus input when the write strobe is active
low. All digital inputs are TTL/CMOS (5 V) compatible. The
on-board amplifiers can drive up to 10 mA from either a single
or dual supply. The on-board reference that is always connected
to the internal DACs has 5 mA available to drive external devices.
Its compact size, low power, and economical cost-per-channel,
make the DAC8426 attractive for applications requiring mul-
tiple D/A converters without sacrificing circuit-board space. Sys-
tem reliability is also increased due to reduced parts count.
PMI’s advanced oxide-based, silicon-gate, CMOS process al-
lows the DAC8426’s analog and digital circuitry to be manufac-
tured on the same chip. This, coupled with PMI’s highly stable
thin-film R-2R resistor ladder, aids in matching and tempera-
ture tracking between DACs.
FEATURES
No Adjustments Required, Total Error 1 LSB Max
Over Temperature
Four Voltage-Output DACs on a Single Chip
Internal 10 V Bandgap Reference
Operates from Single 15 V Supply
Fast 50 ns Data Load Time, All Temperatures
Pin-for-Pin Replacement for PM-7226 and AD7226,
Eliminates External Reference
APPLICATIONS
Process Controls
Multichannel Microprocessor Controlled:
System Calibration
Op Amp Offset and Gain Adjust
Level and Threshold Setting
GENERAL DESCRIPTION
The DAC8426 is a complete quad voltage output D/A converter
with internal reference. This product fits directly into any exist-
ing 7226 socket where the user currently has a 10 V external
reference. The external reference is no longer necessary. The
internal reference of the DAC8426 is laser-trimmed to
±
0.4%
FUNCTIONAL BLOCK DIAGRAM
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
= DGND = 0 V,
=0
DAC8426–SPECIFICATIONS
(V = +15 V 10%, AGNDunless otherwiseVnoted.)V, T = –55 C to +125 C
applies for DAC8426AR/BR, T = –40 C to +85 C applies for DAC8426ER/EP/FR/FP/FS,
DD
SS
A
A
Parameter
STATIC PERFORMANCE
Resolution
Total Unadjusted Error
1
Relative Accuracy
Differential Nonlinearity
2
Full-Scale Temperature Coefficient
Zero Scale Error
Zero Scale Error
Temperature Coefficient
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
Load Regulation
Line Regulation
Output Noise
3
Output Current
DIGITAL INPUTS
Logic Input “0”
Logic Input “1”
Input Current
Input Capacitance
3
POWER SUPPLIES
Positive Supply Current
4
Negative Supply Current
4
Power Dissipation
5
Power Supply Sensitivity
Symbol
N
TUE
INL
DNL
TCG
FS
V
ZSE
TCV
ZS
V
REF
OUT
TCV
REF
OUT
LD
REG
LN
REG
e
n
rms
I
REF
OUT
V
INL
V
INH
I
IN
C
IN
I
DD
I
SS
P
DISS
P
SS
Conditions
Min
8
Typ
Max
Units
Bits
LSB
LSB
LSB
LSB
LSB
ppm/°C
mV
µV/°C
Includes Reference
A, E
B, F
A, E
B, F
25
±
1
±
2
±
1/2
±
1
±
1
20
Includes Reference
Dual Supply
No Load
∆I
L
= 5 mA
∆V
DD
±
10%
f
= 0.1 Hz to 10 Hz
∆V
REF
OUT < 40 mV
V
SS
= –5 V
A, E
B, F
9.96
9.92
10
10.04
10.08
20
0.02
0.008
3
7
0.1
0.04
10
5
V
V
ppm/°C
%/mA
%/V
µV
p-p
mA
V
V
µA
pF
mA
mA
mW
%/%
0.8
2.4
V
IN
= 0 V or V
DD
0.1
4
6
4
90
0.0002
10
8
14
10
210
0.01
Dual Supply
∆V
DD
=
±
5%
V
SS
= –5 V
ELECTRICAL CHARACTERISTICS
Parameter
DAC OUTPUT
Output Current (Source)
3
Output Current (Sink)
3
Minimum Load Resistance
DYNAMIC PERFORMANCE
3
V
OUT
Slew Rate
V
OUT
Settling Time
(Positive or Negative)
Digital Crosstalk
SWITCHING CHARACTERISTICS
3
Address To Write Setup Time
Address To Write Hold Time
Data Valid To Write Setup Time
Data Valid To Write Hold Time
Write Pulse Width
V
DD
= +15 V 10%, AGND = DGND = 0 V, V
SS
= 0 V, T
A
= –55 C to +125 C applies for
DAC8426AR/BR, T
A
= –40 C to +85 C applies for DAC8426ER/EP/FR/FP/FS, unless otherwise noted.
Symbol
I
OUT
SOURCE
I
OUT
SINK
R
L(MIN)
SR
t
S
Q
t
AS
t
AH
t
DS
t
DH
t
WR
0
0
70
10
50
Conditions
Digital In = All Ones
Digital In = All Zeroes V
SS
= –5 V
Digital In = All Ones
Min
10
350
2
Typ
6
Max
Units
mA
µA
kΩ
V/µs
µs
nVs
ns
ns
ns
ns
ns
450
To
±
1/2 LSB, R
L
= 2 kΩ
4
3
10
NOTES
1
Includes Full-Scale Error, Relative Accuracy, and Zero Code Error. Note
±
1 LSB =
±
0.39% error.
2
All devices guaranteed monotonic over the full operating temperature range.
3
Guaranteed and not subject to production test.
4
Digital inputs V
IN
= V
INL
or V
INH
; V
OUT
and V
REF
OUT unloaded.
5
P
DISS
calculated by I
DD
×
V
DD
.
6
Typicals represent measured characteristics at T
A
= +25°C.
Specifications subject to change without notice.
–2–
REV. C
DAC8426
ABSOLUTE MAXIMUM RATINGS
CAUTION
V
DD
to AGND or DGND . . . . . . . . . . . . . . . . . –0.3 V, +17 V
V
SS
to AGND or DGND . . . . . . . . . . . . . . . . . . . . . –7 V, V
DD
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +24 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +5 V
Digital Input Voltage to DGND . . . . . . . . . . . . . –0.3 V, V
DD
V
REF
OUT to AGND
1
. . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
V
OUT
to AGND
1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
Operating Temperature
Military AR/BR . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Extended Industrial ER/EP/FR/FP/FS . . . . –40°C to +85°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
THERMAL RESISTANCE
1. Do not apply voltages higher than V
DD
or less than V
SS
po-
tential on any terminal.
2. The digital control inputs are zener-protected; however,
permanent damage may occur on unprotected units from
high-energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.
3. Do not insert this device into powered sockets. Remove
power before insertion or removal.
4. Stresses above those listed under “Absolute Maximum Rat-
ings” may cause permanent damage to device.
PIN CONNECTIONS
Package Type
20-Pin Cerdip (R)
20-Pin Plastic DIP (P)
20-Pin SOL(S)
JA
2
JC
70
61
80
7
24
22
Units
°C/W
°C/W
°C/W
20-Pin Cerdip
(R Suffix)
20-Pin Epoxy DIP
(P Suffix)
20-Pin SOL
(S Suffix)
NOTES
1
Outputs may be shorted to any terminal provided the package power dissipation
is not exceeded. Typical output short-circuit current to AGND is 50 mA.
2
θ
JA
is specified for worst case mounting conditions, i.e.,
θ
JA
is specified for de-
vice in socket for cerdip and P-DIP packages;
θ
JA
is specified for device sol-
dered to printed circuit board for SOL package.
ORDERING GUIDE
1
Model
DAC8426AR
2
DAC8426ER
DAC8426EP
DAC8426BR
2
DAC8426FR
DAC8426FP
DAC8426FS
3
Total Unadjusted Error
±
1 LSB
±
1 LSB
±
1 LSB
±
2 LSB
±
2 LSB
±
2 LSB
±
2 LSB
Temperature Range
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
20-Pin Cerdip (Q-20)
20-Pin Cerdip (Q-20)
20-Pin Plastic DIP (N-20)
20-Pin Cerdip (Q-20)
20-Pin Cerdip (Q-20)
20-Pin Plastic DIP (N-20)
20-Lead SOL (R-20)
NOTES
1
Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages.
2
For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet.
3
For availability and burn-in information on SO and PLCC packages, contact your local sales office.
Burn-In Circuit
REV. C
–3–
DAC8426
DICE CHARACTERISTICS
1. V
OUT B
2. V
OUT A
3. V
SS
4. V
REF
OUT
5. AGND
6. DGND
7. DB
7
(MSB)
8. DB
6
9. DB
5
10. DB
4
11. DB
3
12. DB
2
13. DB
1
14. DB
0
(LSB)
15.
WR
16. A
1
17. A
0
18. V
DD
19. V
OUT D
20. V
OUT C
DIE SIZE 0.129
×
0.152 inch, 19,608 sq. mils
(3.28
×
3.86 mm, 12.65 sq. mm)
WAFER TEST LIMITS
apply for DACs A, B, C, and D.
Parameter
Total Unadjusted Error
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Zero Code Error
DAC Output Current
Reference Output Voltage
Load Regulation
Line Regulation
Reference Output Current
Logic Inputs High
Logic Inputs Low
Logic Input Current
Positive Supply Current
Negative Supply Current
at V
DD
= +15 V
5%; V
SS
= AGND = DGND = 0 V; unless otherwise specified. T
A
= +25 C. All specifications
DAC8426GBC
Limits
±
2
±
1
±
1
±
1
±
20
10
10.04
0.1
0.04
5
2.4
0.8
±
1
14
10
Symbol
TUE
INL
DNL
G
FSE
V
ZSE
I
OUT
SOURCE
V
REF
OUT
LD
REG
LN
REG
I
REF
OUT
V
INH
V
INL
I
IN
I
DD
I
SS
Conditions
Units
LSB max
LSB max
LSB max
LSB max
mV max
mA min
V max
%/mA max
%/V max
mA min
V min
V max
µA
max
mA max
mA max
Digital In = All Ones
No Load
∆I
L
= 5 mA
∆V
DD
=
±
10 V
∆V
REF
OUT < 40 mV
V
IN
= 0 V or V
DD
V
IN
= V
INL
or V
INH
V
IN
= V
INL
or V
INH’
V
SS
= –5 V
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8426 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. C
Typical Performance Characteristics–DAC8426
Channel-to-Channel Matching (DACs
A, B, C, D, Superimposed)
Relative Accuracy vs. Code
at T
A
= –55
°
C, +25
°
C, +125
°
C
(All Superimposed)
Zero Code Error vs. Temperature
Long Term Drift Accelerated by
Burn-In
V
OUT
Noise Density vs. Frequency
Broadband Noise (DC to 200 kHz)
V
OUT
(0)
,
PSRR(+) =
–20
LOG
V
DD
V
DD
=
+15
V
1
V
P
, V
SS
=
0
V
V
OUT
(0)
,
PSRR(–) =
–20
LOG
V
SS
V
DD
=
+15
V, V
SS
=
–4
V
1
V
P
Power Supply Current vs.
Temperature
PSRR vs. Frequency
REV. C
–5–
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