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74HC20D,653

Description
IC GATE NAND 2CH 4-INP 14SO
Categorylogic    logic   
File Size812KB,15 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Download Datasheet Parametric Compare View All

74HC20D,653 Overview

IC GATE NAND 2CH 4-INP 14SO

74HC20D,653 Parametric

Parameter NameAttribute value
Brand NameNexperia
Parts packaging codeSOIC
package instructionSOP,
Contacts14
Manufacturer packaging codeSOT108-1
Reach Compliance Codecompliant
Factory Lead Time4 weeks
seriesHC/UH
JESD-30 codeR-PDSO-G14
JESD-609 codee4
length8.65 mm
Logic integrated circuit typeNAND GATE
Humidity sensitivity level1
Number of functions2
Number of entries4
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)135 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
Base Number Matches1
74HC20; 74HCT20
Dual 4-input NAND gate
Rev. 4 — 18 November 2015
Product data sheet
1. General description
The 74HC20; 74HCT20 is a dual 4-input NAND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
.
2. Features and benefits
Complies with JEDEC standard JESD7A
Low-power dissipation
Input levels:
For 74HC20: CMOS level
For 74HCT20: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +80
C
and from
40 C
to +125
C.
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC20D
74HCT20D
74HC20DB
74HCT20DB
74HC20PW
74HCT20PW
40 C
to +125
C
TSSOP14
40 C
to +125
C
SSOP14
40 C
to +125
C
Name
SO14
Description
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT337-1
SOT402-1
Type number

74HC20D,653 Related Products

74HC20D,653 74HCT20D,653 74HCT20D,652 74HC20PW,118 74HCT20DB,118 74HCT20DB,112 74HC20DB,112
Description IC GATE NAND 2CH 4-INP 14SO IC GATE NAND 2CH 4-INP 14SO IC GATE NAND 2CH 4-INP 14SO IC GATE NAND 2CH 4-INP 14TSSOP IC GATE NAND 2CH 4-INP 14SSOP IC GATE NAND 2CH 4-INP 14SSOP IC GATE NAND 2CH 4-INP 14SSOP
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
Parts packaging code SOIC SOIC SOIC TSSOP SSOP1 SSOP1 SSOP1
package instruction SOP, SOP, SOP, TSSOP-14 SSOP, SSOP, SSOP14,.3 SSOP,
Contacts 14 14 14 14 14 14 14
Manufacturer packaging code SOT108-1 SOT108-1 SOT108-1 SOT402-1 SOT337-1 SOT337-1 SOT337-1
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant
series HC/UH HCT HCT HC/UH HCT HCT HC/UH
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14
JESD-609 code e4 e4 e4 e4 e4 e4 e4
length 8.65 mm 8.65 mm 8.65 mm 5 mm 6.2 mm 6.2 mm 6.2 mm
Logic integrated circuit type NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE
Humidity sensitivity level 1 1 1 1 1 1 1
Number of functions 2 2 2 2 2 2 2
Number of entries 4 4 4 4 4 4 4
Number of terminals 14 14 14 14 14 14 14
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP TSSOP SSOP SSOP SSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260 260 NOT SPECIFIED 260 260 260
propagation delay (tpd) 135 ns 42 ns 42 ns 135 ns 42 ns 42 ns 135 ns
Maximum seat height 1.75 mm 1.75 mm 1.75 mm 1.1 mm 2 mm 2 mm 2 mm
Maximum supply voltage (Vsup) 6 V 5.5 V 5.5 V 6 V 5.5 V 5.5 V 6 V
Minimum supply voltage (Vsup) 2 V 4.5 V 4.5 V 2 V 4.5 V 4.5 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED 30 30 NOT SPECIFIED 30 30 30
width 3.9 mm 3.9 mm 3.9 mm 4.4 mm 5.3 mm 5.3 mm 5.3 mm
Base Number Matches 1 - 1 1 1 1 1
Maker - Nexperia - Nexperia Nexperia Nexperia Nexperia
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