TJA1042
High-speed CAN transceiver with Standby mode
Rev. 10 — 24 November 2017
Product data sheet
1. General description
The TJA1042 high-speed CAN transceiver provides an interface between a Controller
Area Network (CAN) protocol controller and the physical two-wire CAN bus. The
transceiver is designed for high-speed CAN applications in the automotive industry,
providing the differential transmit and receive capability to (a microcontroller with) a CAN
protocol controller.
The TJA1042 belongs to the third generation of high-speed CAN transceivers from NXP
Semiconductors, offering significant improvements over first- and second-generation
devices such as the TJA1040. It offers improved ElectroMagnetic Compatibility (EMC)
and ElectroStatic Discharge (ESD) performance, and also features:
•
Ideal passive behavior to the CAN bus when the supply voltage is off
•
A very low-current Standby mode with bus wake-up capability
•
TJA1042T/3 and TJA1042TK/3 can be interfaced directly to microcontrollers with
supply voltages from 3 V to 5 V
The TJA1042 implements the CAN physical layer as defined in ISO 11898-2:2016 and
SAE J2284-1 to SAE J2284-5. This implementation enables reliable communication in the
CAN FD fast phase at data rates up to 5 Mbit/s.
These features make the TJA1042 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.
2. Features and benefits
2.1 General
ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant
Timing guaranteed for data rates up to 5 Mbit/s in the CAN FD fast phase
Suitable for 12 V and 24 V systems
Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
V
IO
input on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3 V to 5 V
microcontrollers
SPLIT voltage output on TJA1042T for stabilizing the recessive bus level
Available in SO8 package and leadless HVSON8 package (3.0 mm
3.0 mm) with
improved Automated Optical Inspection (AOI) capability
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
AEC-Q100 qualified
NXP Semiconductors
TJA1042
High-speed CAN transceiver with Standby mode
2.2 Predictable and fail-safe behavior
Very low-current Standby mode with host and bus wake-up capability
Functional behavior predictable under all supply conditions
Transceiver disengages from the bus when not powered up (zero load)
Transmit Data (TXD) dominant time-out function
Bus-dominant time-out function in Standby mode
Undervoltage detection on pins V
CC
and V
IO
2.3 Protections
High ESD handling capability on the bus pins (8 kV)
High voltage robustness on CAN pins (58 V)
Bus pins protected against transients in automotive environments
Thermally protected
3. Quick reference data
Table 1.
Symbol
V
CC
V
IO
V
uvd(VCC)
V
uvd(VIO)
I
CC
Quick reference data
Parameter
supply voltage
supply voltage on pin V
IO
undervoltage detection voltage
on pin V
CC
undervoltage detection voltage
on pin V
IO
supply current
Standby mode
Normal mode; bus recessive
Normal mode; bus dominant
I
IO
supply current on pin V
IO
Standby mode; V
TXD
= V
IO
Normal mode
recessive; V
TXD
= V
IO
dominant; V
TXD
= 0 V
V
ESD
V
CANH
V
CANL
T
vj
electrostatic discharge voltage
voltage on pin CANH
voltage on pin CANL
virtual junction temperature
IEC 61000-4-2 at pins CANH and CANL
15
-
8
58
58
40
80
350
-
-
-
-
200
+8
+58
+58
A
kV
V
V
1000
A
Conditions
Min
4.5
2.8
3.5
1.3
-
2.5
20
5
Typ
-
-
-
2.0
10
5
45
-
Max
5.5
5.5
4.5
2.7
15
10
70
14
Unit
V
V
V
V
A
mA
mA
A
+150
C
TJA1042
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 24 November 2017
2 of 26
NXP Semiconductors
TJA1042
High-speed CAN transceiver with Standby mode
4. Ordering information
Table 2.
Ordering information
Package
Name
TJA1042T
TJA1042T/3
TJA1042TK/3
SO8
SO8
HVSON8
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic small outline package; 8 leads; body width 3.9 mm
plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3
3
0.85 mm
Version
SOT96-1
SOT96-1
SOT782-1
Type number
[1]
[1]
TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with V
IO
pin.
5. Block diagram
V
IO
5
V
CC
3
V
CC
TJA1042
TEMPERATURE
PROTECTION
V
IO(1)
SLOPE
CONTROL
AND
DRIVER
7
CANH
TXD
1
TIME-OUT
6
CANL
V
IO(1)
STB
8
MODE
CONTROL
5
SPLIT
SPLIT
(1)
RXD
4
MUX
AND
DRIVER
WAKE-UP
FILTER
2
GND
015aaa017
(1) In a transceiver with a SPLIT pin, the V
IO
input is internally connected to V
CC
.
Fig 1.
Block diagram
TJA1042
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 24 November 2017
3 of 26
NXP Semiconductors
TJA1042
High-speed CAN transceiver with Standby mode
6. Pinning information
6.1 Pinning
a. TJA1042T: SO8
Fig 2.
Pin configuration diagrams
b. TJA1042T/3: SO8
c. TJA1042TK/3: HVSON8
6.2 Pin description
Table 3.
Symbol
TXD
GND
V
CC
RXD
SPLIT
V
IO
CANL
CANH
STB
[1]
Pin description
Pin
1
2
[1]
3
4
5
5
6
7
8
Description
transmit data input
ground supply
supply voltage
receive data output; reads out data from the bus lines
common-mode stabilization output; in TJA1042T version only
supply voltage for I/O level adapter; in TJA1042T/3 and TJA1042TK/3 versions
only
LOW-level CAN bus line
HIGH-level CAN bus line
Standby mode control input
HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
TJA1042
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 24 November 2017
4 of 26
NXP Semiconductors
TJA1042
High-speed CAN transceiver with Standby mode
7. Functional description
The TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the
functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved
EMC and ESD handling capability and quiescent current performance. Improved slope
control and high DC handling capability on the bus pins provide additional application
flexibility.
The TJA1042 is available in two versions, distinguished only by the function of pin 5:
•
The TJA1042T is backwards compatible with the TJA1040 when used with a 5 V
microcontroller, and also covers existing PCA82C250 and PCA82C251 applications
•
The TJA1042T/3 and TJA1042TK/3 allow for direct interfacing to microcontrollers with
supply voltages down to 3 V
7.1 Operating modes
The TJA1042 supports two operating modes, Normal and Standby, which are selected via
pin STB. See
Table 4
for a description of the operating modes under normal supply
conditions.
Table 4.
Mode
Normal
Standby
Operating modes
Pin STB
LOW
HIGH
Pin RXD
LOW
bus dominant
wake-up request
detected
HIGH
bus recessive
no wake-up request
detected
7.1.1 Normal mode
A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit
and receive data via the bus lines CANH and CANL (see
Figure 1
for the block diagram).
The differential receiver converts the analog data on the bus lines into digital data which is
output to pin RXD. The slopes of the output signals on the bus lines are controlled
internally and are optimized in a way that guarantees the lowest possible EME.
7.1.2 Standby mode
A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not
able to transmit or correctly receive data via the bus lines. The transmitter and
Normal-mode receiver blocks are switched off to reduce supply current, and only a
low-power differential receiver monitors the bus lines for activity. The wake-up filter on the
output of the low-power receiver does not latch bus dominant states, but ensures that only
bus dominant and bus recessive states that persist longer than t
fltr(wake)bus
are reflected on
pin RXD.
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by V
IO
, and is capable of detecting CAN bus
activity even if V
IO
is the only supply voltage available. When pin RXD goes LOW to signal
a wake-up request, a transition to Normal mode will not be triggered until STB is forced
LOW.
TJA1042
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 24 November 2017
5 of 26
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