General Features
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Single-package High Performance, Low Power AVR 8-bit Microcontroller with LIN
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Transceiver, 5V Regulator and Watchdog
Very Low Current Consumption in Sleep Mode
8Kbytes/16Kbytes Flash Memory for Application Program (Atmel ATA6616/ATA6617)
Supply Voltage Up to 40V
Operating Voltage: 5V to 27V
Temperature Range: T
case
–40°C to +125°C
QFN38, 5mm
×
7mm Package
1. Description
Atmel
®
ATA6616/ATA6617 is a System-in-Package (SiP) product, which is particu-
larly suited for complete LIN-bus node applications. It supports highly integrated
solutions for in-vehicle LIN networks. The first chip is the LIN-system-basis-chip
(LIN-SBC) ATA6624, which has an integrated LIN transceiver, a 5V regulator and a
window watchdog. The second chip is an automotive microcontroller from Atmel
®
’s
series of AVR
®
8-bit microcontroller with advanced RISC architecture, the Atmel
ATtiny87 with 8-Kbytes and the Atmel ATtiny167 with 16-Kbytes flash memory.
All pins of the LIN System Basis Chip as well as all pins of the AVR microcontroller are
bonded out to provide customers the same flexibility for their applications as they
have when using discrete parts.
In section 2 you will find the pin configuration for the complete SiP. In section 3 the
LIN SBC is described, and in section 6 the AVR is described in detail.
Figure 1-1.
Application Diagram
LIN Bus
Microcontroller
with LIN
Transceiver,
5V Regulator
and Watchdog
Atmel ATA6616
Atmel ATA6617
Atmel ATA6616/17
MCU
Atmel
ATtiny 87/167
LIN-SBC
Atmel
ATA6624
9132E–AUTO–05/11
2. Atmel ATA6616/ATA6617 LIN System in Package Solution (SIP)
2.1
Pinning Atmel ATA6616/ATA6617
Pinning QFN38
AGND
AVCC
LIN
GND
PB6
PB7
PA7
PA6
PA5
PA4
PA3
WAKE
Figure 2-1.
PB5
PB4
VCC
GND
GND
GND
PB3
31 30
29 28 27 26 25 24 23 22 21 20
32
19
33
34
35
36
37
38
1
PB2
2
PB1
3
PB0
4
PA0
5
PA1
6
PA2
7
RXD
8
INH
18
17
NTRIG
EN
VS
VCC
PVCC
KL15
MODE
Atmel ATA6616/17
16
15
14
13
9 10 11 12
NRES
WD_OSC
TXD
TM
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Note:
Pin Description
Symbol
PB2
PB1
PB0
PA0
PA1
PA2
RXD
(1)
INH
(1)
TXD
(1)
NRES
(1)
WD_OSC
(1)
TM
(1)
MODE
(1)
KL_15
(1)
PVCC
(1)
VCC
(1)
VS
(1)
EN
(1)
NTRIG
(1)
WAKE
(1)
GND
(1)
LIN
(1)
Function
Port B 2 I/O line (PCINT10/OC1AV/USCK/SCL)
Port B 1 I/O line (PCINT9/OC1BU/DO)
Port B 0 I/O line (PCINT8/OC1AU/DI/SDA)
Port A 0 I/O line (PCINT0/ADC0/RXD/RXLIN)
Port A 1 I/O line (PCINT1/ADC1/TXD/TXLIN)
Port A 2 I/O line (PCINT2/ADC2/OC0A/DO/MISO)
Receive data output
Battery-related output for controlling an external voltage regulator
Transmit data input; active low output (strong pull down) after a local wake-up request
Output undervoltage and watchdog reset (open drain)
External resistor for adjustable watchdog timing
For factory testing only (tie to ground)
For debug mode: Low watchdog is on; high watchdog is off
Ignition detection (edge sensitive)
5V regulator sense input pin
5V regulator output/driver pin
Battery supply
Enables the device into Normal Mode
Low level watchdog trigger input from microcontroller
High voltage input for local wake-up request; if not needed connect to VS
System Ground LIN-SBC
LIN bus line input/output
1. This identifies the pins of the LIN SBC Atmel
®
ATA6624
2
Atmel ATA6616/ATA6617
9132E–AUTO–05/11
Atmel ATA6616/ATA6617
Table 2-1.
Pin
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Note:
Pin Description (Continued)
Symbol
PA3
AVCC
AGND
PA4
PA5
PA6
PA7
PB7
PB6
PB5
PB4
VCC
GND
GND
GND
PB3
Backside
Function
Port A 3 I/O line (PCINT3/ADC3/ISRC/INT0)
Analog supply voltage
Analog ground
Port A 4 I/O line (PCINT4/ADC4/ICP1/DI/SDA/MOSI)
Port A 5 I/O line (PCINT5/ADC5/T1/USCK/SCL)
Port A 6 I/O line (PCINT6/ADC6/AIN0/SS)
Port A 7 I/O line (PCINT7/ADC7/AIN1)
Port B 7 I/O line (PCINT15/ADC10/OC1BX / RESET)
Port B 6 I/O line (PCINT14/ADC9/OC1AX/INT0)
Port B 5 I/O line (PCINT13/ADC8/OC1BW/XTAL2/CLKO)
Port B 4 I/O line (PCINT12/OC1AW/XTAL1/CLKI)
AVR supply voltage
System ground
Ground (optional)
Ground (optional)
Port B 3 I/O line (PCINT11/OC1BV)
Heat slug is connected to GND
1. This identifies the pins of the LIN SBC Atmel
®
ATA6624
2.2
Absolute Maximum Ratings
Maximum Ratings of the SiP
Table 2-2.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
HBM ESD
ANSI/ESD-STM5.1
JESD22-A114
AEC-Q100 (002)
CDM ESD STM 5.3.1
Machine Model ESD AEC-Q100-RevE
Storage temperature
Operating temperature
(1)
Thermal resistance junction to heat slug
Thermal resistance junction to ambient
Thermal shutdown of VCC regulator
Thermal shutdown of LIN output
Thermal shutdown hysteresis
Note:
T
s
T
case
R
thjc
R
thja
150
150
Symbol
Min.
Typ.
Max.
Unit
±3
KV
±1
±150
–55
–40
6
30
165
165
10
170
170
+150
+125
KV
V
°C
°C
K/W
K/W
°C
°C
°C
1. T
case
means the temperature of the heat slug (backside). It is mandatory that this backside temperature is
≤
125°C in the
application.
3
9132E–AUTO–05/11
3. LIN System-basis-chip Block
3.1
Features
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Master and Slave Operation Possible
Supply Voltage up to 40V
Operating voltage V
S
= 5V to 27V
Typically 10µA Supply Current During Sleep Mode
Typically 57µA Supply Current in Silent Mode
Linear Low-drop Voltage Regulator:
– Normal, Fail-safe, and Silent Mode
– V
CC
= 5.0V ±2%
– In Sleep Mode V
CC
is Switched Off
VCC Undervoltage Detection (4ms Reset Time) and Watchdog Reset Logical Combined at Open
Drain Output NRES
Negative Trigger Input for Watchdog
Boosting the Voltage Regulator Possible with an External NPN Transistor
LIN Physical Layer According to LIN 2.0, 2.1 Specification and SAEJ2602-2
Wake-up Capability via LIN-bus, Wake Pin, or Kl_15 Pin
INH Output to Control an External Voltage Regulator or to Switch off the Master Pull-up
Resistor
TXD Time-out Timer
Bus Pin is Overtemperature and Short-circuit Protected versus GND and Battery
Adjustable Watchdog Time via External Resistor
Advanced EMC and ESD Performance
Fulfills the OEM “Hardware Requirements for LIN in Automotive Applications Rev.1.1”
Interference and Damage Protection According ISO7637
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3.2
Description
The LIN-SBC is a fully integrated LIN transceiver, which complies with the LIN 2.0, 2.1 and
SAEJ2602-2 specifications. It has a low-drop voltage regulator with a 5V/50mA output and a
window watchdog.
The LIN-SBC is designed to handle the low-speed data communication in vehicles, e.g., in
convenience electronics. Improved slope control at the LIN-driver ensures secure data com-
munication up to 20kBaud. Sleep Mode and Silent Mode guarantee very low current
consumption.
4
Atmel ATA6616/ATA6617
9132E–AUTO–05/11
Atmel ATA6616/ATA6617
Figure 3-1.
Block Diagram
VS
Normal
and
Fail-safe
Mode
PVCC
Receiver
INH
-
RXD
Normal
Mode
+
RF Filter
WAKE
KL_15
PVCC
Edge
Detection
Wake-up
Bus Timer
LIN
TXD
TXD
Time-out
Timer
Slew
Rate Control
Short
Circuit
and
Overtemperature
Protection
Control Unit
EN
Debounce
Time
Mode
Select
Normal/Silent/
Fail-safe Mode
3.3/5V
/50 mA/±2%
Undervoltage
Reset
VCC
PVCC
NRES
Internal Testing
Unit
GND
PVCC
OUT
Watchdog
Adjustable
Watchdog
Oscillator
WD_OSC
MODE
TM
NTRIG
5
9132E–AUTO–05/11
Embedded System
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