DEMO MANUAL DC1397B
LTC2656
16-Bit, Octal Rail-to-Rail DAC
with 10ppm/°C Max Reference
DESCRIPTION
Demonstration circuit 1397B features the
LTC
®
2656
Octal
16-bit DAC with ±4LSB INL error. This device establishes
a new board-density benchmark for 16-bit DACs and
advances performance standards for output drive, cross-
talk and load regulation in single supply, voltage-output
multiple DACs.
The DC1397B has many features for evaluating the per-
formance of the LTC2656. An external 1.25V precision
reference is provided.
Another feature of this board is the onboard LTC2428
20-bit delta-sigma ADC for monitoring the DAC output
voltage. The 16ppm total error of this device is adequate
for taking meaningful measurements of various LTC2656
parameters.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TO
DC590
ANALOG
OUTPUT
Figure 1. DC1397B Connection Diagram
PERFORMANCE SUMMARY
PARAMETER
Resolution
Monotonicity
Differential Nonlinearity
Integral Nonlinearity
Load Regulation
DC Crosstalk
DEMO BOARD TYPE
DC1397B-A
DC1397B-B
LTC2656 VARIATION
LTC2656BCUFD-L16
LTC2656BCUFD-H16
CONDITION
Specifications are at T
A
= 25°C
VALUE
16 Bits
16 Bits
±1LSB Maximum
±4LSB Maximum
2LSB/mA Maximum
3.5µV/mA
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V, Mid-Scale, I
OUT
= ±15mA
Due to Load Current Change on Any Other Channel
FULL SCALE
2.5V
4.096V
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DEMO MANUAL DC1397B
QUICK START PROCEDURE
Connect DC1397B to a DC590 USB serial controller using
the supplied 14-conductor ribbon cable. Connect DC590
to a host PC with a standard USB A/B cable. Run the
evaluation software supplied with DC590 or download it
from www.linear.com/software. The correct control panel
will be loaded automatically. Click the COLLECT button
to begin outputting codes to the DACs and reading back
the resulting output voltage for each DAC.
Complete software documentation is available from the
Help menu item, as features may be added periodically.
Figure 2. Demo Board Software
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DEMO MANUAL DC1397B
HARDWARE SETUP
Jumpers
JP1 – V
REF
Select. Either a 1.25V/2.048V internal or 1.25V
onboard reference can be selected. To apply an external
reference through the V
REF
turret, set jumper to EXT.
JP2 – Power-Up Mode. The LTC2656 can be set to either
power up at Mid-Scale or Zero-Scale.
JP3 – ADC Disable. Set to ON for normal operation, with
the onboard ADC enabled. For very sensitive noise mea-
surements, the ADC may be disabled. The software will
then display a positive full-scale reading.
Analog Connections
DAC Outputs – The eight DAC outputs from the LTC2656
are brought out to turrets labeled DAC A through DAC H.
These may be connected to external instruments or other
circuitry. DAC outputs are not in alphabetical order on the
circuit board.
V
REF
– The V
REF
turret is connected directly to the REFIN/
OUT pin of the LTC2656.
When one of the onboard references is being used, the
reference voltage may be monitored at this point. An
external reference may also be applied to this turret after
setting JP1 to EXT.
Grounding and Power Connections
Power (V
CC
) – Normally DC1397B is powered by the DC590
controller. V
CC
can be supplied to this turret, however
the power supply on DC590 must be disabled! Refer to
DC590 Quick Start Guide for more details on this mode
of operation.
Grounding – Signal ground is connected to the exposed
ground planes at the top and bottom edges of the board,
and to the two turrets labeled “Gnd.” Use signal ground
as the reference point for measurements and connections
to external circuits.
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DEMO MANUAL DC1397B
PARTS LIST
ITEM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
20
QTY
0
5
2
1
1
0
14
1
1
1
3
1
4
3
0
1
1
1
1
1
1
REFERENCE
C1 (Opt.)
C2, C5, C7, C9, C10
C3, C6
C4
C8
C11 (Opt.)
E1-E14
JP1
JP2
JP3
SHUNT
J1
R1, R2, R3, R4
R5, R6, R7
U2 (Opt.)
U3
U4
U5
U6
U1
U1
PART DESCRIPTION
CAP., 0402
CAP., X7R, 0.1µF, 16V, 10% 0402
CAP., X7R, 1.0µF, 10V, 10% 0603
RES., CHIP, 0, 0402
CAP., C0G, 100pF, 25V, 5% 0402
CAP., 0603
TESTPOINT, TURRET, 0.061" PBF
2X4, 0.079 DOUBLE ROW HEADER
2X2, 0.079 DOUBLE ROW HEADER
3 PIN 0.079 SINGLE ROW HEADER
SHUNT, 0.079" CENTER
CONNECTOR, DUAL 2X7 0.079CC
RES., CHIP, 7.5k, 1/16W, 5% 0402
RES., CHIP, 5.1k, 1/16W, 5% 0402
I.C., LT1790 SOT23-6
I.C., LT1790ACS6-1.25 SOT23-6
I.C., LT1790ACS6-5 SOT23-6
I.C., LTC2428CG SSOP-28G
I.C., Serial EEPROM TSSOP8
I.C., LTC2656BCUFD-L16, UFD-20
I.C., LTC2656BCUFD-H16, UFD-20
LINEAR., LT1790ACS6-1.25#PBF
LINEAR., LT1790ACS6-5#PbF
LINEAR., LTC2428CG#PBF
MICROCHIP, 24LC025-I/ST
LINEAR TECH
LINEAR TECH
MILL-MAX, 2308-2-00-80-00-00-07-0
SAMTEC, TMM104-02-L-D
SAMTEC, TMM102-02-L-D
SAMTEC, TMM103-02-L-S
SAMTEC, 2SN-BK-G
MOLEX, 87831-1420
VISHAY, CRCW04027K50JNED
VISHAY, CRCW04025K10JNED
TAIYO YUDEN, EMK105BJ104KV
TAIYO YUDEN, LMK107BJ105KA
VISHAY, CRCW04020000Z0ED
AVX, 04023A101JAT2A
MANUFACTURER/PART NUMBER
Assembly Type-A
Assembly Type-B
REVISION HISTORY
REV
B
DATE
10/13
DESCRIPTION
Add REFCOMP Capacitor
PAGE NUMBER
Throughout
dc1397bf
4
V+
4
GND
DNC
DNC
1
2
GND
3
5
VIN
C11
1.0uF
opt.
VOUT
C1
0.1uF
opt.
VCC
JP2
Mid Scale
Zero Scale
REF2 8
7
5
3
1
C4
0
6
C3
1.0uF
INT 2
REF1 6
EXT 4
JP1
4
GND
C2
0.1uF
DNC
DNC
1
2
GND
3
5
VIN
VOUT
2
U3
LT1790ACS6-1.25
1
4
3
VREF
E9
6
U2
LT1790(opt.)
ASSEMBLY TYPE
*
VERSION TABLE
U1
DC1397B-A
LTC2656BCUFD-L16
DC1397B-B
LTC2656BCUFD-H16
LDAC
VCC
SCHEMATIC DIAGRAM
VCC
VCC
2
5
6
17
12
11
E10
VD
E1
VOUTA
VOUTB
VOUTC
7
VOUTD
VOUTE
VOUTF
VOUTG
GND
VOUTH
12
13
14
15
17
16
11
15
CH1
CH2
CH3
CH4
CH5
CH6
ZSset
GND
GND
GND
GND
GND
GND
CH7
10
14
CH0
9
13
4
E7
E5
3
4
VH
1
E6
VF
E8
7.5K
20
C8
100pF
VG
VE
R2
E3
E14
VCC
C9
0.1uF
2
3
LDAC
VCC
CLR
U1
VCC
C12
0.1uF
R1
7.5K
VC
E2
VB
E4
FSset
VA
C5
0.1uF
J1
HDR2X7-079-MOLEX
V+
V+
VUNREG
PROSEL
CS
7
8
SDI
10
9
SDI
SDO
SDO
SCK
CS/LD
SCK
1
E11
*
REFCOMP
U4
LT1790ACS6-5
6
VOUT
C6
1.0uF
VIN
GND
GND
DNC
DNC
2
1
4
3
5
V+
5V
2
SCK/SCL
4
VCC
VCC
MUXOUT
2
EEVCC
DAC-SDO
GND
REFLO
10
ADCIN
FSset
MISO
5
8
MOSI/SDA
7
REFIN/OUT
CS
6
C7
0.1uF
EESDA
9
CS_ADC
CS_MUX
SCK
CLK
DIN
SDO
F0
GND
23
20
25
19
21
24
26
JP3
VCC
Enable Disable
3
1
R3
7.5K
EESCL
21
19
18
11
EEGND
12
GND
GND
8
13
3
GND
NC
14
R4
7.5K
5
6
CONTRACT NO.
28
27
18
22
U5
LTC2428CG
16
1
E12
GND
8
R6
5.1K
SCL
WP
5
SDA
GND
A2
A1
A0
3
2
1
7
VCC
C10
0.1uF
4
U6
24LC025-I/ST
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
6
R5
5.1K
R7
5.1K
E13
GND
CUSTOMER NOTICE
DATE
2/21/08
2/21/08
TECHNOLOGY
TITLE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC2656BCUFD
12/16-BIT, OCTAL DAC W/REFERENCE
APPROVED
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
APPROVALS
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
DRAWN
J. Wu
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
ENGINEER
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
L. Chen
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
CHECKED
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SIZE CAGE CODE
DWG NO
DC1397B
Thursday, October 10, 2013
SCALE:
REV
1
FILENAME:
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DEMO MANUAL DC1397B
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