DEMO MANUAL DC1796A
LTC6360
Driving 18-Bit SAR ADC
Description
The LTC
®
6360 is a very low noise, high precision, high
speed amplifier, suitable for driving SAR ADCs. The
LTC6360 features a total output noise of 2.3nV/√Hz com-
bined with 150ns settling time to 16-bit levels (A
V
= 1).
While powered from a single 5V supply, the amplifier output
can swing to 0V while maintaining high linearity. This is
made possible with the inclusion of a very low noise on-
chip charge pump that generates a negative voltage to bias
the output stage of the amplifier, increasing the allowable
negative voltage swing. The LTC2370/LTC2369/LTC2368/
LTC2367/LTC2364 are low power, low noise ADCs with
serial outputs that can operate from a single 2.5V supply.
Demonstration circuit 1796A demonstrates the DC and
AC performance of the LTC6360 driving the LTC2369-18
in conjunction with the DC590B QuikEval™ and DC718
fast DAACS data collection boards. Use the DC590B to
demonstrate DC performance such as peak-to-peak noise
and DC linearity. Use the DC718 if precise sampling rates
are required or to demonstrate AC performance, such as
SNR, THD, SINAD and SFDR. The demonstration circuit
1796A is intended to demonstrate recommended ground-
ing, component placement and selection, routing and
bypassing for the LTC6360 and the ADC.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
QuikEval and PScope are trademarks of Linear Technology Corporation. All other trademarks are
the property of their respective owners.
BoarD photo
GND
9V TO 10V
CLKIN
100MHz Max
3.3V
P-P
Max
TO DC718
AIN+/AIN–
TO DC590
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Figure 1. Demo Circuit 1796A
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DEMO MANUAL DC1796A
assemBly options
Table 1. DC1796A Assembly Options
ASSEMBLY VERSION
DC1796A-A
DC1796A-B
DC1796A-C
DC1796A-D
DC1796A-E
DC1796A-F
DC1796A-G
DC1796A-H
U1 PART NUMBER
LTC2370CMS-16
LTC2368CMS-16
LTC2367CMS-16
LTC2364CMS-16
LTC2369CMS-18
LTC2368CMS-18
LTC2367CMS-18
LTC2364CMS-18
MAX CONVERSION RATE
2Msps
1Msps
0.5Msps
0.25Msps
1.6Msps
1Msps
0.5Msps
0.25Msps
NUMBER OF BITS
16
16
16
16
18
18
18
18
MAX CLKIN FREQUENCY
100MHz
50MHz
25MHz
12.5MHz
99.2MHz
62MHz
31MHz
15.5MHz
Quick start proceDure
This board is tested by measuring the distortion at
–1dBFS, 2kHz single-ended input, as shown in Figure 2.
A low noise, low distortion generator such as Audio Pre-
cision SYS-2722, B&K Type 1051 or Stanford Research
DS360, should be used for SINAD, THD or SNR testing.
A low jitter RF oscillator, such as the Marconi Instruments
Multisource Generator 2026, should be used as the clock
source.
To test the boards follow the steps below:
1. Make sure that all the jumpers are set as shown in
Figure 2 (DC1796A test diagram).
2. Power up the board by applying +9VDC.
3. Apply the clock signal to connector J1. Set the clock
frequency to 99.2MHz (to achieve a 1.6Msps conver-
sion rate for an 18-bit SAR ADC). Refer to the Clock
Source section for more detailed information. Set the
clock amplitude to 3.3V
PP
.
4. For best SNR measurement data, a 2.3kHz cutoff fre-
quency lowpass filter is used in the input signal at J2.
See the Analog Input section for more details.
5. Apply a 2kHz, –1dBFS signal to connector J2. There are
several ways of level shifting the input signal. In this
case, the V
REF
/2 turret on the demo board was used to
provide level shifting of the input signal. V
REF
/2 should
be properly bypassed to ground to minimize noise on
the input signal.
The performance that results from these connections is
displayed in Figure 7.
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DEMO MANUAL DC1796A
Quick start proceDure
dc1796a F02
Figure 2. DC1796A Test Diagram
Dc718 setup
Connect the DC1796A to a DC718 USB high speed data
collection board using connector J3. Then, connect the
DC718 to a host PC with a standard USB A/B cable. Ap-
ply +9V to the indicated terminals. Run the QuikEval II
software (pscope.exe version K72, or later) supplied with
the DC718, or download it from www.linear.com.
Complete software documentation is available from the
Help menu. Updates can be downloaded from the Tools
menu. Check for updates periodically, as new features
may be added.
The PScope™ software should recognize the DC1796A
and configure itself automatically.
Click the Collect button (See Figure 7) to begin acquiring
data. The Collect button then changes to Pause, which
can be clicked to stop data acquisition.
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DEMO MANUAL DC1796A
Dc590B setup
IMPORTANT! To avoid damage to the DC1796A, make
sure that VCCIO (JP5) is set to 3.3V before connecting
the DC590B to the DC1796A.
Connect the DC590B to a host PC with a standard USB
A/B cable. Connect the DC1796A to a DC590B USB serial
controller using the supplied 14-conductor ribbon cable.
Run the evaluation software supplied with the DC590B,
or download it from www.linear.com.
The correct control panel will be loaded automatically.
Click the Collect button to begin reading the ADC (see
Figure 8).
Dc1796a setup
DC Power
The DC1796A requires +9VDC and draws about 60mA.
Most of the supply current is consumed by the CPLD,
regulators and discrete logic on the board. The +9VDC
input voltage powers the LTC6360 and the ADC through
LT1763 regulators, which provide protection against ac-
cidental reverse bias. Additional regulators provide power
for the CPLD.
Clock Source
Provide a low jitter 3.3V
P-P
sine or square wave to J1.
The clock input is AC-coupled, so the DC level of the
clock signal is not important. A low jitter RF oscillator,
such as the Marconi Instruments Multisource Generator
2026, is recommended. Even a good generator can start
to produce noticeable jitter at low frequencies. Therefore,
it is recommended for lower sample rates to divide down
a higher frequency clock to the desired sample rate. The
ratio of clock frequency to conversion rate is 62:1 for
18-bit parts and 50:1 for 16-bit parts. If the clock input
is to be driven with logic, it is recommended that the
50Ω terminator (R6) be removed. Slow rising edges may
compromise the SNR of the converter in the presence of
high amplitude, higher frequency input signals.
Reference
The default reference is a LTC6655 4.096V reference. An
external reference can be used by removing (U3) and
populating (R3). If an external reference is used, it must
settle quickly in the presence of glitches on the REF pin.
Analog Input
The default driver configuration of the DC1796A is shown
in Figure 3. This circuit buffers a single-ended 0V to 4V
input signal applied at AIN
+
.
For better distortion, the feedback impedance R22 should
be matched to the source impedance. Impedance match-
ing negates the effects of input bias current. However, no
impedance matching was used for the results provided
in Figure 7, for simplicity of measurements.
Audio Precision SYS-2722 has a 40Ω source input im-
pedance in the configuration used. Adding another 5Ω
(a total of 45Ω) with a C = 1.5µF to GND in a simple RC
filter fixture off the board creates a lowpass filter with a
2.3kHz cutoff frequency. This filter is not added on the
board due to various input frequencies that the user might
select. It is important to use a very low distortion capaci-
tor for the input filter. Shown in Figure 4, Figure 5 and
Figure 6, are other DC1796A driver configurations. In
order to create the configurations shown in Figure 5 and
Figure 6, component R14 (0Ω) needs to be removed from
the board.
AC-coupling the input may degrade the distortion perfor-
mance due to nonlinearity of the coupling capacitor.
For component values for various circuit gains, refer
to the Application Information section of the LTC6360
data sheet.
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DEMO MANUAL DC1796A
Dc1796a setup
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Figure 3. DC-Coupled Noninverting LTC6360 Drives LTC2369-18 18-Bit SAR ADC
dc1796a F04
Figure 4. AC-Coupled Noninverting LTC6360 Drives LTC2369-18 18-Bit SAR ADC
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