ATMEGA32HVE2-PLPW datasheet, PDF

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ATMEGA32HVE2-PLPW: DescriptionIC MCU 8BIT 32KB FLASH 48QFN; Categorysemiconductor The embedded processor and controller; File Size19MB，217 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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ATMEGA32HVE2-PLPW Overview

IC MCU 8BIT 32KB FLASH 48QFN

ATMEGA32HVE2-PLPW Parametric

Parameter Name	Attribute value
core processor	AVR
core size	8-bit
speed	15MHz
Connectivity	LINbus，SPI，UART/USART，LINbus-SBC
Peripheral	Undervoltage detection/reset, POR, WDT
Number of I/Os	10
Program storage capacity	32KB（32K x 8）
Program memory type	flash memory
EEPROM capacity	1K x 8
RAM capacity	4K x 8
Voltage - Power Supply (Vcc/Vdd)	3 V ~ 3.6 V
data converter	A/D 1x17b trigonometric integral, 1x18b trigonometric integral
Oscillator type	internal
Operating temperature	-40°C ~ 125°C（TA）
Package/casing	48-VFQFN Exposed Pad
Supplier device packaging	48-QFN（7x7）

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Atmel ATmega32HVE2/ATmega64HVE2

8-bit AVR Microcontroller with Precise Analog Frontend

for very Accurate Voltage and Current Measurement

DATASHEET

Features

●

Single-package fully-integrated

●

High precision analog frontend

●

17bit single-ended voltage-ADC

●

7 selectable input channels

●

Offset voltage less than ±1LSB

●

18 bit differential current-ADC with

●

Programmable gain amplifier

●

Comparator Mode

●

Offset voltage less than ±5µV

●

Temperature measurement with external and internal sensors

●

Integrated voltage divider with internal reverse polarity protection for direct

sensing of the battery voltage

●

Interface

●

LIN physical layer according to LIN 2.0, 2.1 and SAEJ2602-2

●

Fulfils the OEM “Hardware Requirements for LIN in Automotive Applications

Rev. 1.1”

●

LIN hardware UART

●

Advanced ESD and EMC performance

●

High-speed Mode up to 115kBaud

●

Microcontroller

●

High performance, low power AVR 8-bit microcontroller

●

32bit math. extension module (+, –, x, /)

●

Memory

●

32K/64K in-system self-programmable flash memory

●

1K EEPROM / 4K SRAM

●

Power

●

Supply voltage –27V to +40V

●

Extreme low power consumption

●

Others

●

Package: QFN48, 7x7mm

●

Temperature range: –40°C to +125°C

8096C–AVR–01/13

2.1.6

Port A (PA1..PA0)

Port A serves as a 2-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). As inputs, Port A pins that are

externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Port A is connected to the input MUX of the Voltage ADC. To avoid any disturbance from Port A pins when doing high accuracy

VADC measurements, is not recommended to connect noisy digital signals to these pins.

Port A also serves the functions of various special features of the Atmel

ATmega32HVE2/ATmega64HVE2 as listed in

Section

21.3.1 “Alternate Functions of Port A” on page 85.

2.1.7

Port B (PB7..0)

Port B is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). As inputs, Port B pins that are

externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Port B also serves the functions of various special features of the Atmel

ATmega32HVE2/ATmega64HVE2 as listed in

Section 21.3.2 “Alternate Functions of Port B” on page 86.

2.1.8

PV2/NV2

Filtered positive/negative input from resistor divider connected to VS. Used by the Voltage ADC to measure the battery pack

voltage. For details, see

Section 26. “ADC - Analog to Digital Converter” on page 138.

2.1.9

PI/NI

Filtered positive/negative input from external current sense resistor. Used by the Current ADC to measure charge/discharge

currents flowing in the battery pack. For details, see

Section 26. “ADC - Analog to Digital Converter” on page 138.

2.1.10 RESET/dw

Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not

running. The minimum pulse length is given in

Section 31.5 “External Interrupt Characteristics” on page 198.

Shorter pulses are

not guaranteed to generate a reset. This pin is also used as debugWIRE communication pin.

2.1.11 VS

VS represents the power supply to the chip.The LIN operating voltage is VS = 5V to 27V. An undervoltage detection is

implemented to disable data transmission if VS falls below VS

in order to avoid false bus messages. After switching on VS, the

IC starts in Fail-safe Mode, and the voltage regulator is switched on (i.e., 3.3V/50mA output capability).

The supply current is typically 10µA in Sleep Mode and 40µA in Silent Mode.

2.1.12 VREG

The internal 3.3V voltage regulator is capable of driving loads up to 50mA. It is able to supply the microcontroller and other ICs

on the PCB and is protected against overloads by means of current limitation and overtemperature shut-down. Furthermore, the

output voltage is monitored and will cause a reset signal at the NRES output pin if it drops below a defined threshold Vthun. To

boost up the maximum load current, an external NPN transistor may be used, with its base connected to the VREG pin and its

emitter connected to PVREG.

2.1.13 PVREG

The PVREG is the sense input pin of the 3.3V voltage regulator. For normal applications (i.e. when only using the internal output

transistor), this pin must be connected to the VREG pin. If an external boosting transistor is used, the PVREG pin must be

connected to the output of this transistor, i.e, its emitter terminal.

Atmel ATA9999 [Datasheet]

8096C–AVR–01/13

2.1.14 LIN

A low-side driver with internal current limitation and thermal shutdown and an internal pull-up resistor compliant with the LIN 2.x

specification is implemented. The allowed voltage range is between –27V and +40V. Reverse currents from the LIN bus to VS

are suppressed, even in the event of GND shifts or battery disconnection. LIN receiver thresholds are compatible with the LIN

protocol specification. The fall time from recessive to dominant bus state and the rise time from dominant to recessive bus state

are slope controlled.

2.1.15 TXD

In Normal Mode the TXD pin is the microcontroller interface used to control the state of the LIN output. TXD must be pulled to

ground in order to have a low LIN-bus. If TXD is high or not connected (internal pull-up resistor), the LIN output transistor is

turned off, and the bus is in recessive state. During Fail-safe Mode, this pin is used as output and is signalling the fail-safe

source. It is current-limited to I

TXDwake

(Section

10. “Electrical Characteristics LIN SBC” on page 25ff).

2.1.16 RXD

This output pin reports the state of the LIN-bus to the microcontroller. LIN high (recessive state) is reported by a high level at

RXD; LIN low (dominant state) is reported by a low level at RXD. The output has an internal pull-up resistor with typically 5kΩ to

PVREG. The AC characteristics can be defined with an external load capacitor of 20pF. The output is short-circuit protected.

RXD is switched off in Unpowered Mode (i.e., VS = 0V). During Fail-safe Mode it is signalling the fail-safe source.

2.1.17 EN

The Enable Input pin controls the operation mode of the device. If EN is high, the circuit is in Normal Mode, with transmission

paths from TXD to LIN and from LIN to RXD both active. The VREG voltage regulator operates with 3.3V/5V/50mA output

capability.

If EN is switched to low while TXD is still high, the device is forced to Silent Mode. No data transmission is then possible, and

the current consumption is reduced to I

typ. 40µA. The VREG regulator has its full functionality.

If EN is switched to low while TXD is low, the device is forced to Sleep Mode. No data transmission is possible, and the voltage

regulator is switched off.

2.1.18 MODE

With the pin MODE you can enable / disable the watchdog of the LIN SBC. Connect the MODE pin directly or via an external

resistor to GND for normal watchdog operation. To debug the software of the connected microcontroller, connect MODE pin to

PVREG and the watchdog is switched off.

Note:

If you do not use the watchdog from the LIN SBC, connect pin MODE directly to PVREG.

2.1.19 TM

The TM pin is used for final production measurements at Atmel

. In normal application, it has to be always connected to GND.

2.1.20 NRES

The Reset Output pin, an open drain output, switches to low during VREG undervoltage or a watchdog failure generated by the

LIN SBC.

2.1.21 WD_OSC

The WD_OSC Output pin provides a typical voltage of 1.2V, which supplies an external resistor with values between 34kΩ and

120kΩ to adjust the watchdog oscillator time. If the watchdog is disabled, this voltage is switched off and you can either tie to

GND or leave this pin open. In the ATmega64HVE2 Operating circuit this pin is left open.

2.1.22 NTRIG

The NTRIG Input pin is the trigger input for the window watchdog of the LIN SBC. A pull-up resistor is implemented. A negative

edge triggers the watchdog. The trigger signal (low) must exceed a minimum time t

trigmin

to generate a watchdog trigger (see

also

Section 9. “Watchdog” on page 23).

Atmel ATA9999 [Datasheet]

8096C–AVR–01/13

ATMEGA32HVE2-PLPW Related Products

	ATMEGA32HVE2-PLPW	ATMEGA32HVE2-PLQW	ATMEGA64HVE2-PLPW	ATMEGA64HVE2-PLQW
Description	IC MCU 8BIT 32KB FLASH 48QFN	IC MCU 8BIT 32KB FLASH 48QFN	IC MCU 8BIT 64KB FLASH 48QFN	IC MCU 8BIT 64KB FLASH 48QFN
core processor	AVR	AVR	AVR	AVR
core size	8-bit	8-bit	8-bit	8-bit
speed	15MHz	15MHz	15MHz	15MHz
Connectivity	LINbus，SPI，UART/USART，LINbus-SBC	LINbus，SPI，UART/USART，LINbus-SBC	LINbus，SPI，UART/USART，LINbus-SBC	LINbus，SPI，UART/USART，LINbus-SBC
Peripheral	Undervoltage detection/reset, POR, WDT	Undervoltage detection/reset, POR, WDT	Undervoltage detection/reset, POR, WDT	Undervoltage detection/reset, POR, WDT
Number of I/Os	10	10	10	10
Program storage capacity	32KB（32K x 8）	32KB（32K x 8）	64KB（64K x 8）	64KB（64K x 8）
Program memory type	flash memory	flash memory	flash memory	flash memory
EEPROM capacity	1K x 8	1K x 8	1K x 8	1K x 8
RAM capacity	4K x 8	4K x 8	4K x 8	4K x 8
Voltage - Power Supply (Vcc/Vdd)	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V
data converter	A/D 1x17b trigonometric integral, 1x18b trigonometric integral	A/D 1x17b trigonometric integral, 1x18b trigonometric integral	A/D 1x17b trigonometric integral, 1x18b trigonometric integral	A/D 1x17b trigonometric integral, 1x18b trigonometric integral
Oscillator type	internal	internal	internal	internal
Operating temperature	-40°C ~ 125°C（TA）	-40°C ~ 125°C（TA）	-40°C ~ 125°C（TA）	-40°C ~ 125°C（TA）
Package/casing	48-VFQFN Exposed Pad	48-VFQFN Exposed Pad	48-VFQFN Exposed Pad	48-VFQFN Exposed Pad
Supplier device packaging	48-QFN（7x7）	48-QFN（7x7）	48-QFN（7x7）	48-QFN（7x7）

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