Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MCIMX31
Rev. 4.1, 11/2008
MCIMX31 and
MCIMX31L
MCIMX31 and
MCIMX31L
Multimedia Applications
Processors
Package Information
Plastic Package
Case 1581 14 x 14 mm, 0.5 mm Pitch
Case 1931 19 x 19 mm, 0.8 mm Pitch
Ordering Information
See
Table 1 on page 3
for ordering information.
1
Introduction
Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering Information . . . . . . . . . . . . . . . . . . . . . 3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional Description and Application
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
ARM11 Microprocessor Core . . . . . . . . . . . . . . 4
Module Inventory . . . . . . . . . . . . . . . . . . . . . . . 6
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . 9
Electrical Characteristics . . . . . . . . . . . . . . . . 10
Chip-Level Conditions . . . . . . . . . . . . . . . . . . 10
Supply Power-Up/Power-Down Requirements
and Restrictions . . . . . . . . . . . . . . . . . . . . 18
Module-Level Electrical Specifications . . . . . . 21
Package Information and Pinout . . . . . . . . . 104
MAPBGA Production Package—
457 14 x 14 mm, 0.5 mm Pitch . . . . . . . . . . . 104
MAPBGA Production Package—
473 19 x 19 mm, 0.8 mm Pitch . . . . . . . . . . . 110
Ball Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Product Differences . . . . . . . . . . . . . . . . . . . . 118
Product Documentation . . . . . . . . . . . . . . . . 119
Revision History . . . . . . . . . . . . . . . . . . . . . . . 120
The MCIMX31 and MCIMX31L multimedia
applications processors represent the next step in
low-power, high-performance application processors.
Unless otherwise specified, the material in this data sheet
is applicable to both the MCIMX31 and MCIMX31L
processors and referred to singularly throughout this
document as MCIMX31. The MCIMX31L does not
include a graphics processing unit (GPU).
Based on an ARM11™ microprocessor core, the
MCIMX31 provides the performance with low power
consumption required by modern digital devices such
as:
• Feature-rich cellular phones
• Portable media players and mobile gaming
machines
• Personal digital assistants (PDAs) and Wireless PDAs
• Portable DVD players
• Digital cameras
The MCIMX31 takes advantage of the ARM1136JF-S™
core running at up to 532 MHz, and is optimized for
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2005–2008. All rights reserved.
Introduction
minimal power consumption using the most advanced techniques for power saving (DPTC, DVFS, power
gating, clock gating). With 90 nm technology and dual-Vt transistors (two threshold voltages), the
MCIMX31 provides the optimal performance versus leakage current balance.
The performance of the MCIMX31 is boosted by a multi-level cache system, and features peripheral
devices such as an MPEG-4 Hardware Encoder (VGA, 30 fps), an Autonomous Image Processing Unit, a
Vector Floating Point (VFP11) co-processor, and a RISC-based SDMA controller.
The MCIMX31 supports connections to various types of external memories, such as DDR, NAND Flash,
NOR Flash, SDRAM, and SRAM. The MCIMX31 can be connected to a variety of external devices using
technology, such as high-speed USB2.0 OTG, ATA, MMC/SDIO, and compact flash.
1.1
Features
The MCIMX31 is designed for the high-tier, mid-tier smartphone markets, and portable media players.
They provide low-power solutions for high-performance demanding multimedia and graphics
applications.
The MCIMX31 is built around the ARM11 MCU core and implemented in the 90 nm technology.
The systems include the following features:
• Multimedia and floating-point hardware acceleration supporting:
— MPEG-4 real-time encode of up to VGA at 30 fps
— MPEG-4 real-time video post-processing of up to VGA at 30 fps
— Video conference call of up to QCIF-30 fps (decoder in software), 128 kbps
— Video streaming (playback) of up to VGA-30 fps, 384 kbps
— 3D graphics and other applications acceleration with the ARM
®
tightly-coupled Vector
Floating Point co-processor
— On-the-fly video processing that reduces system memory load (for example, the
power-efficient viewfinder application with no involvement of either the memory system or the
ARM CPU)
• Advanced power management
— Dynamic voltage and frequency scaling
— Multiple clock and power domains
— Independent gating of power domains
• Multiple communication and expansion ports including a fast parallel interface to an external
graphic accelerator (supporting major graphic accelerator vendors)
• Security
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
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Freescale Semiconductor
Introduction
1.2
Ordering Information
Table 1
provides the ordering information for the MCIMX31.
Table 1. Ordering Information
Part Number
MCIMX31VKN5
MCIMX31LVKN5
MCIMX31VKN5B
MCIMX31LVKN5B
MCIMX31VKN5C
MCIMX31LVKN5C
MCIMX31CVKN5C
MCIMX31LCVKN5C
MCIMX31VMN5C
MCIMX31LVMN5C
1
2
3
4
5
Silicon Revision
1, 2, 3,4
1.15
1.15
1.2
1.2
2.0
2.0
2.0
2.0
2.0
2.0
Device Mask
2L38W and 3L38W
2L38W and 3L38W
M45G
M45G
M91E
M91E
M91E
M91E
M91E
M91E
Operating Temperature
Range (°C)
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
–40 to 85
–40 to 85
0 to 70
0 to 70
Package
5
14 x 14 mm,
0.5 mm pitch,
MAPBGA-457,
Case 1581
14 x 14 mm,
0.5 mm pitch,
MAPBGA-457,
Case 1581
19 x 19 mm,
0.8 mm pitch,
Case 1931
Information on reading the silicon revision register can be found in the IC Identification (IIM) chapter of the Reference Manual,
see
Section 7, “Product Documentation.”
Errata and fix information of the various mask sets can be found in the standard MCIMX31 Chip Errata, see
Section 7, “Product
Documentation.”
Changes in output buffer characteristics can be found in the I/O Setting Exceptions and Special Pad Descriptions table in the
Reference Manual, see
Section 7, “Product Documentation.”
JTAG functionality is not tested nor guaranteed at -40°C.
Case 1581 and 1931 are RoHS compliant, lead-free, MSL = 3, and solders at 260°C.
1.2.1
Feature Differences Between Mask Sets
The following is a summary of differences between silicon Revision 2.0, mask set M91E, and previous
revisions of silicon. A complete list of these differences is given in
Table 72.
• Extended operating temperature range is available: –40°C to 85°C
• Supply current information changes, as shown in
Table 13
and
Table 14
• FUSE_VDD supply voltage is floated or grounded during read operation
• No restriction on PLL versus core supply voltage
• Operating frequency as shown in
Table 8.
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
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Functional Description and Application Information
1.3
Block Diagram
SRAM, PSRAM,
NOR Flash
SDRAM
DDR
NAND Flash,
SmartMedia
Camera
Sensor (2)
Parallel
Display (2)
Serial
LCD
Figure 1
shows the MCIMX31 simplified interface block diagram.
Tamper
Detection
Mouse
Keyboard
External Memory
Interface (EMI)
MPEG-4
Video Encoder
Image Processing Unit (IPU)
Inversion and Rotation
Camera Interface
Blending
SDMA
Display/TV Ctl
Pre and Post Processing
Internal
Memory
Expansion
SDHC (2)
PCMCIA/CF
Mem Stick (2)
SIM
ATA
Debug
ECT
SJC
Security
SCC
RTIC
RNGA
GPS
* GPU unavailable for i.MX31L
ATA
Hard Drive
Timers
RTC
WDOG
GPT
EPIT (2)
AP Peripherals
AUDMUX
SSI (2)
UART (5)
I
2
C (3)
FIR
CSPI (3)
PWM
USB Host (2)
USB-OTG
KPP
GPIO
CCM
1-WIRE
®
IIM
GPU*
Power
Management
IC
ARM11
TM
Platform
ARM1136JF-S
TM
I-Cache
D-Cache
L2-Cache
MAX
ROMPATCH
VFP
8x8
Keypad
Serial
EPROM
ETM
Fast
IrDA
Bluetooth Baseband
WLAN
SD
Card
PC
Card
PC
Card
USB
Host/Device
Figure 1. MCIMX31 Simplified Interface Block Diagram
2
2.1
Functional Description and Application Information
ARM11 Microprocessor Core
The CPU of the MCIMX31 is the ARM1136JF-S core based on the ARM v6 architecture. It supports the
ARM Thumb
®
instruction sets, features Jazelle
®
technology (which enables direct execution of Java byte
codes), and a range of SIMD DSP instructions that operate on 16-bit or 8-bit data values in 32-bit registers.
The ARM1136JF-S processor core features:
• Integer unit with integral EmbeddedICE
™
logic
• Eight-stage pipeline
• Branch prediction with return stack
• Low-interrupt latency
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Functional Description and Application Information
•
•
•
•
•
•
•
•
Instruction and data memory management units (MMUs), managed using micro TLB structures
backed by a unified main TLB
Instruction and data L1 caches, including a non-blocking data cache with Hit-Under-Miss
Virtually indexed/physically addressed L1 caches
64-bit interface to both L1 caches
Write buffer (bypassable)
High-speed Advanced Micro Bus Architecture (AMBA)
™
L2 interface
Vector Floating Point co-processor (VFP) for 3D graphics and other floating-point applications
hardware acceleration
ETM
™
and JTAG-based debug support
2.1.1
Memory System
The ARM1136JF-S complex includes 16 KB Instruction and 16 KB Data L1 caches. It connects to the
MCIMX31 L2 unified cache through 64-bit instruction (read-only), 64-bit data read/write (bi-directional),
and 64-bit data write interfaces.
The embedded 16K SRAM can be used for audio streaming data to avoid external memory accesses for
the low-power audio playback, for security, or for other applications. There is also a 32-KB ROM for
bootstrap code and other frequently-used code and data.
A ROM patch module provides the ability to patch the internal ROM. It can also initiate an external boot
by overriding the boot reset sequence by a jump to a configurable address.
Table 2
shows information about the MCIMX31 core in tabular form.
Table 2. MCIMX31 Core
Core
Acronym
Core
Name
Brief Description
The ARM1136™ Platform consists of the ARM1136JF-S core, the ETM
real-time debug modules, a 6 x 5 multi-layer AHB crossbar switch (MAX), and
a Vector Floating Processor (VFP).
The MCIMX31 provides a high-performance ARM11 microprocessor core and
highly integrated system functions. The ARM Application Processor (AP) and
other subsystems address the needs of the personal, wireless, and portable
product market with integrated peripherals, advanced processor core, and
power management capabilities.
Integrated Memory
Includes
• 16 Kbyte Instruction
Cache
• 16 Kbyte Data
Cache
• 128 Kbyte L2 Cache
• 32 Kbyte ROM
• 16 Kbyte RAM
ARM11 or ARM1136
ARM1136 Platform
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
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