Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11AI
GENERAL DESCRIPTION
Enhanced performance, high speed switching npn transistor in TO220AB envelope specially suited for high
frequency electronic lighting ballast applications and converters, inverters, switching regulators, motor control
systems etc.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CEO
I
C
I
CM
P
tot
V
CEsat
I
Csat
t
f
PARAMETER
Collector-emitter voltage peak value
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Collector Saturation current
Inductive fall time
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
2.5
0.08
MAX.
1000
450
5
10
100
1.5
0.15
UNIT
V
V
A
A
W
V
A
µs
T
mb
≤
25 ˚C
I
C
= 2.5 A; I
B
= 0.33 A
I
Con
= 2.5 A; I
Bon
= 0.5 A
PINNING - TO220AB
PIN
1
2
3
tab
base
collector
emitter
collector
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
c
b
1 23
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
PARAMETER
Collector-emitter voltage peak value
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-65
-
MAX.
1000
450
5
10
2
4
100
150
150
UNIT
V
V
A
A
A
A
W
˚C
˚C
T
mb
≤
25 ˚C
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Junction to mounting base
Junction to ambient
in free air
CONDITIONS
TYP.
-
-
MAX.
1.25
60
UNIT
K/W
K/W
April 2002
1
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11AI
STATIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
I
CES
I
CES
I
EBO
V
CEOsust
V
CEsat
V
BEsat
h
FE
h
FE
h
FEsat
PARAMETER
Collector cut-off current
1
Emitter cut-off current
Collector-emitter sustaining voltage
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
CONDITIONS
V
BE
= 0 V; V
CE
= V
CESMmax
V
BE
= 0 V; V
CE
= V
CESMmax
;
T
j
= 125 ˚C
V
EB
= 9.0 V; I
C
= 0 A
I
B
= 0 A; I
C
= 100 mA;
L = 25 mH
I
C
= 2.5 A;I
B
= 0.33 A
I
C
= 2.5 A;I
B
= 0.33 A
I
C
= 5 mA; V
CE
= 5 V
I
C
= 0.5 A; V
CE
= 5 V
I
C
= 2.5 A; V
CE
= 5 V
MIN.
-
-
-
450
-
-
10
14
9
TYP.
-
-
-
-
-
-
20
22
13
MAX.
1.0
2.0
10.0
-
1.5
1.3
35
35
17
UNIT
mA
mA
mA
V
V
V
DYNAMIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
Switching times resistive load
t
on
t
s
t
f
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times inductive load
t
s
t
f
t
s
t
f
Turn-off storage time
Turn-off fall time
Turn-off storage time
Turn-off fall time
I
Con
= 2.5 A; I
Bon
= 0.5 A; L
B
= 1
µH;
-V
BB
= 5 V
I
Con
= 2.5 A; I
Bon
= 0.5 A; L
B
= 1
µH;
-V
BB
= 5 V; T
j
= 100 ˚C
CONDITIONS
I
Con
= 2.5 A; I
Bon
= 0.5 A; -I
Boff
= 0.5 A
0.6
3.4
0.6
1.0
4.0
0.8
µs
µs
µs
TYP.
MAX.
UNIT
1.1
80
1.2
140
1.4
150
1.5
300
µs
ns
µs
ns
IC / mA
+ 50v
100-200R
250
Horizontal
Oscilloscope
Vertical
300R
30-60 Hz
6V
1R
200
100
0
VCE / V
min
VCEOsust
Fig.1. Test circuit for V
CEOsust
.
Fig.2. Oscilloscope display for V
CEOsust
.
1
Measured with half sine-wave voltage (curve tracer).
April 2002
2
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11AI
VCC
ICon
90 %
IC
RL
VIM
0
tp
IB
RB
T.U.T.
ts
toff
IBon
10 %
tf
t
T
-IBoff
t
Fig.3. Test circuit resistive load. V
IM
= -6 to +8 V
V
CC
= 250 V; t
p
= 20
µs; δ
= t
p
/ T = 0.01.
R
B
and R
L
calculated from I
Con
and I
Bon
requirements.
Fig.6. Switching times waveforms with inductive load.
90 %
ICon
120
90 %
%
Normalised Derating
with heatsink compound
110
100
90
IC
10 %
ts
ton
toff
IBon
10 %
tr
30ns
-IBoff
tf
80
70
60
50
40
30
20
10
0
0
20
40
60
80
Ths / C
100
120
140
P tot
IB
Fig.4. Switching times waveforms with resistive load.
Fig.7. Normalised power derating and second
breakdown curves.
VCC
6
5
4
IC / A
BUT11AX
LC
3
IBon
LB
T.U.T.
2
1
0
0
400
VCE / V
800
1200
-VBB
Fig.5. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V; L
C
= 200 uH; L
B
= 1 uH
Fig.8. Reverse bias safe operating area. T
j
≤
T
j max
April 2002
3
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11AI
100
h FE
BUT11AX
10
Zth / (K/W)
5V
10
1V
1
D= 0.5
0.2
0.1
0.05
0.02
0
0.1
1
0.01
0.1
1
IC / A
10
100
P
D
tp
D=
t
p
T
t
Fig.9. Typical DC current gain.
h
FE
= f(I
C
); parameter V
CE
T
0.01
1E-06
1E-04
1E-02
t/s
1E+00
100
IC / A
Fig.11. Transient thermal impedance.
Z
th j-hs
= f(t); parameter D = t
p
/T
ICM max
10
IC max
= 0.01
tp =
10 us
II
(1)
100 us
1
1 ms
10 ms
I
0.1
(2)
500 ms
DC
III
0.01
1
10
100
VCE / V
1000
Fig.10. Forward bias safe operating area. T
hs
≤
25 ˚C
(1)
(2)
I
II
III
NB:
P
tot
max and P
tot
peak max lines.
Second breakdown limits.
Region of permissible DC operation.
Extension for repetitive pulse operation.
Extension during turn-on in single
transistor converters provided that
R
BE
≤
100
Ω
and t
p
≤
0.6
µs.
Mounted with heatsink compound and
30
±
5 newton force on the centre of the
envelope.
April 2002
4
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11AI
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
4,5
max
10,3
max
1,3
3,7
2,8
5,9
min
15,8
max
3,0 max
not tinned
3,0
13,5
min
1,3
max
1 2 3
(2x)
2,54 2,54
0,9 max (3x)
0,6
2,4
Fig.12. TO220AB; pin 2 connected to mounting base.
Notes
1. Refer to mounting instructions for TO220 envelopes.
2. Epoxy meets UL94 V0 at 1/8".
April 2002
5
Rev 2.000
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