74LVC240ADB,118 datasheet, PDF

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74LVC240ADB,118: DescriptionIC BUFFER INVERT 3.6V 20SSOP; Categorylogic logic; File Size1MB，17 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com

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74LVC240ADB,118 Overview

IC BUFFER INVERT 3.6V 20SSOP

74LVC240ADB,118 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Maker	Nexperia
Parts packaging code	SSOP2
package instruction	SSOP,
Contacts	20
Manufacturer packaging code	SOT339-1
Reach Compliance Code	compliant
Samacsys Description	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G20
JESD-609 code	e4
length	7.2 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
Humidity sensitivity level	1
Number of digits	4
Number of functions	2
Number of ports	2
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	7.5 ns
Certification status	Not Qualified
Maximum seat height	2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	5.3 mm

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74LVC240A

Octal buffer/line driver with 5 V tolerant inputs/outputs;

inverting; 3-state

Rev. 8 — 29 November 2011

Product data sheet

1. General description

The 74LVC240A is an octal inverting buffer/line driver with 3-state outputs. The 3-state

outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes

the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs

makes the circuit highly tolerant of slower input rise and fall times.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices as translators in

mixed 3.3 V or 5 V applications.

The 74LVC240A is functionally identical to the 74LVC244A except that the 244 has

non-inverting outputs.

2. Features and benefits



5 V tolerant inputs for interlacing with 5 V logic

Supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Direct interface with TTL levels

High-impedance when V

= 0 V

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Specified from

40 C

to +85

C

and

40 C

to +125

C

74LVC240ADB,118 Related Products

	74LVC240ADB,118	74LVC240AD,112	74LVC240ADB,112	74LVC240APW,118	74LVC240ABQ,115	74LVC240AD,118	74LVC240APW,112
Description	IC BUFFER INVERT 3.6V 20SSOP	IC BUFFER INVERT 3.6V 20SO	IC BUFFER INVERT 3.6V 20SSOP	IC BUFFER INVERT 3.6V 20TSSOP	IC BUFFER INVERT 3.6V 20DHVQFN	Logic circuit family: 74LVC Logic type: buffer, number of reverse components: 2 Number of bits per component: 4	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state TSSOP2 20-Pin
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Maker	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Parts packaging code	SSOP2	SOP	SSOP2	TSSOP2	QFN	SOP	TSSOP2
package instruction	SSOP,	SOP,	SSOP,	TSSOP,	HVQCCN,	7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20	4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20
Contacts	20	20	20	20	20	20	20
Manufacturer packaging code	SOT339-1	SOT163-1	SOT339-1	SOT360-1	SOT764-1	SOT163-1	SOT360-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Samacsys Description	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us	74LVC240A - Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state@en-us
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PQCC-N20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e4	e4	e4	e4	e4	e4	e4
length	7.2 mm	12.8 mm	7.2 mm	6.5 mm	4.5 mm	12.8 mm	6.5 mm
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Humidity sensitivity level	1	1	1	1	1	1	1
Number of digits	4	4	4	4	4	4	4
Number of functions	2	2	2	2	2	2	2
Number of ports	2	2	2	2	2	2	2
Number of terminals	20	20	20	20	20	20	20
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SOP	SSOP	TSSOP	HVQCCN	SOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260
propagation delay (tpd)	7.5 ns	7.5 ns	7.5 ns	7.5 ns	7.5 ns	7.5 ns	7.5 ns
Maximum seat height	2 mm	2.65 mm	2 mm	1.1 mm	1 mm	2.65 mm	1.1 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
Nominal supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
surface mount	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.65 mm	1.27 mm	0.65 mm	0.65 mm	0.5 mm	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	QUAD	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30	30
width	5.3 mm	7.5 mm	5.3 mm	4.4 mm	2.5 mm	7.5 mm	4.4 mm
Certification status	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified	-
Is it Rohs certified?	-	conform to	conform to	conform to	-	conform to	conform to

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