FPGA Overview
Features
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Support for Industry Standard PC and Workstation CAE tools
Combination Schematic, VHLD, PLD design entry
Macro Library of Over 200 Hard/Soft Functions
Automatic Macro Generators Generate Physical Layout
Floor Planning Capability
Automatic Place and Route
Interactive Layout Editing
Advanced Timing Analysis
100% logical path coverage
No user-vector generation
Displays set-up/hold violations & speed critical paths
Full Back-Annotation for Functional & Timing Simulation
Graphical User Interface
Unified Design Database
Description
Atmel’s Integrated Development System lets designers create fast, predictable de-
signs with AT6000 Series FPGAs.
Available for use on 486/Pentium, Sun Sparc, or HP workstation-based computers,
the Integrated Development System combines industry-standard software for design
entry and simulation with Atmel’s proprietary software for component generation,
automatic and interactive placement and routing, timing analysis, and bit stream gen-
eration.
The Integrated Development System design flow is shown below. Pre-layout modules
verify design logic, place and route modules implement the design, and post-layout
modules reflect the design as it actually appears in silicon.
A Design Manager provides push-button access to each step in the flow. The Design
Manager’s simple user interface streamlines the design flow as it creates a seamless
design environment. Design data is stored in a unified database that eliminates the
need for data re-entry and translation.
The Integrated Development System Physical Design System includes a prototype kit
and Viewlogic PRO Series (PC) or PowerView (Sun) macro libraries. Viewlogic timing
and functional simulation is optional. Mentor, Verilog, Synopsys, Cadence, and Exem-
plar library/interface packages are also available.
AT6000 FPGA
Integrated
Development
System
Overview
Integrated Development System
FPGA Integrated Development
System Overview
0438B
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AT6000 FPGA System Summary
The following is a summary of Integrated Development
System software, hardware, and annual maintenance
agreements. Detailed technical information is contained in
the individual product data sheets.
Atmel offers specially-priced University systems for se-
lected PC and Sun packages.
Sun-based packages
Viewlogic’s design tool family for Sun workstations is
called Powerview, and the schematic entry, gate simula-
tion, and text-based entry options are called ViewDraw,
ViewSim, and ViewSynthesis.
Atmel offers the following Powerview packages:
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ATDS2120SN.
AT6000 Physical Design System with
Powerview Schematic Entry and Viewlogic Simulator
(20K gates)
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FPGA Physical Design System
(ATDS2100PC/ATDS2100SN)
The AT6000 Physical Design System includes the Atmel
Design Manager with PLD interface and macro libraries
for Viewlogic schematic capture synthesis and functional
simulation. Tools are included for macro generation, inter-
active editing, design rule checking, automatic placement
and routing, timing analysis, bitstream generation, and
PROM file generation.
Base PC and Sun system requirements for the Physical
Design System are listed on the next page.
ATDS2130SN.
Viewlogic Viewsynthesis, ViewSim-
VDHL Libraries & Interface for AT6000 Series Design
System
A University system is available for the ATDS2120SN.
Library and Interface packages
Atmel offers several library and interface packages for
customers who wish to use the AT6000 Series Physical
Design System with third-party software from other com-
panies:
PC-based library/interface package
Physical Design System/Viewlogic Standalone
Packages.
Several AT6000 Series design tool packages combine the
Physical Design System with Viewlogic schematic capture
and functional simulation options.
PC-based packages
ATDS2140PC.
Exemplar Library & Interface for AT6000
Series Design System
Sun-based library/interface packages
Viewlogic’s PRO series for the PC includes PROcapture
(schematic entry), PROsim (gate simulation), and PRO-
synthesis (text-based entry).
Atmel offers the following PRO series packages:
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ATDS2101PC.
AT6000 Series Physical Design Sys-
tem with PROcapture Schematic Entry
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ATDS2110PC.
AT6000 Series Physical Design Sys-
tem with PROcapture and PROSim Gate Simulation
(10K gates)
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ATDS2120PC.
AT6000 Series Physical Design Sys-
tem with PROcapture and PROSim Gate Simulation
(20K gates)
Customers with Viewlogic restricted licenses may pur-
chase an Atmel 10K or 20K AT6000 Series Design Sys-
tem & Viewlogic restricted license upgrade.
A University system without a prototype kit is available for
the ATDS2100PC and ATDS2110PC.
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ATDS2130PC.
Viewlogic PROsynthesis, PROsim-
VDHL Libraries & Interface for AT6000 Series Design
System
ATDS2140SN.
Exemplar Library & Interface for AT6000
Series Design System
ATDS2150SN.
Mentor Library & Interface for AT6000 Se-
ries Design System
ATDS2160SN.
Synopsys Library & Interface for AT6000
Series Design System
ATDS2170SN.
Cadence Verilog/Concept Library & Inter-
face for AT6000 Series Design System
Annual Maintenance Agreements
Annual Maintenance Agreements are available for each
package and option in the Integrated Development Sys-
tem. The first year of maintenance is included in the pur-
chase price; renewal is optional. Maintenance Agree-
ments give users direct access to Atmel’s experienced
technical support staff and cover software upgrades that
keep engineers on the leading edge of Atmel’s design
tools. See the individual product data sheets for ordering
and pricing information.
Extended maintenance agreements are not available for
University systems.
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FPGA Overview
FPGA Overview
Prototype Kit
A Prototyping Kit is included in all PC Physical Design
System packages, except University systems. Additional
Prototype Kits can be ordered separately. Each kit in-
cludes a cable for downloading configuration data to a de-
vice and an AT-style board for prototyping designs.
Atmel now offers both 84-pin and 132-pin download
boards for use with the Prototype Kit or the designer’s tar-
get system. The boards can be attached to a host PC run-
ning the AT6000 series software.
Automatic Macro Generators
The AT6000 Physical Design System includes an innova-
tive tool that allows users to create from a large number of
datapath functions (multipliers, adders, accumulators).
The user specifies the parameters and the software
quickly generates a physical layout and schematic, and
reports worst case speed, area, and power consumption.
These functions are layout-independent and resusable.
System Requirements
PC-based systems:
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Fully Compatible 486/Pentium-Based Computer
MS-DOS version 5.0 or greater
Windows version 3.1
Minimum 30 MB fixed disk space (for base system)
CD-ROM player
VGA graphics board and monitor
Windows-Compatible Mouse
One parallel port
32 MB of RAM
Graphical monitor (color recommended)
Minimum 40 MB fixed disk space (for base system)
CD-ROM player
X-Windows or Open Windows support
32 MB of RAM
HP-based Systems
For a single user system, the IDS requires an HP 9000
series 700 workstation equipped as follows:
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CD-ROM drive (local or network)
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100M (minimum) hard drive 50M hard disk space allo-
cated as swap space
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32M RAM
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HP_UX 9.0.1 or higher
Sun-based systems:
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Sun Sparc workstation runnung SUN OS 4.1.2 or
greater
PC-based Tools
Ordering Code
ATDS2100PC
ATDS2101PC
ATDS2110PC
ATDS2110PCI
ATDS2120PC
ATDS2120PCI
ATDS2130PC
ATDS2140PC
ATDS2180PC
Description
AT6000 Series Physical Design System
AT6000 Series Physical Design System with PROcapture Schematic Entry
AT6000 Series Physical Design System with PROcapture and PROSim Gate Simulation (10K)
AT6000 Series Design System & Viewlogic restricted license 10K upgrade
AT6000 Physical Design System with PROcapture and ProSim (20K)
AT6000 Series Design System & Viewlogic restricted license 20K upgrade
Viewlogic PROsynthesis, PROsim-VDHL Libraries & Interface for AT6000 Series Design System
Exemplar Libraries & Interface for AT6000 Series Design System
Integraph Libraries & Interface for AT6000 Series Design System
Maintenance Agreements
ATDM2100PC
ATDM2101PC
ATDM2110PC
Maintenance for AT6000 Series Physical Design System
Maintenance for AT6000 Series Physical Design System with PROcapture
Maintenance for AT6000 Series Physical Design System with PROcapture and PROSim (10K)
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Ordering Code
ATDM2110PCI
ATDM2120PC
ATDM2120PCI
ATDM2130PC
ATDM2140PC
ATDM2180PC
Description
Maintenance for AT6000 Series Design System & Viewlogic restricted license 10K upgrade
Maintenance for AT6000 Physical Design System with PROcapture and ProSim (20K)
Maintenance for AT6000 Series Design System & Viewlogic restricted license 20K upgrade
Maintenance for Viewlogic PROsynthesis, PROsim-VDHL Libraries & Interface for AT6000
Series Design System
Maintenance for Exemplar Library & Interface for AT6000 Series Design System
Maintenance for Integraph Library & Interace for AT6000 Series Design System
University PC-based Tools (does not include Prototyping Kit)
ATDS2100PCU
ATDS2110PCU
University AT6000 Series Physical Design System
University AT6000 Series Physical Design System with PROcapture and ProSim (10K)
PC Design Hardware
ATDH2000
ATDH2080
ATDH2200
AT6000 Series FPGAs Demonstration Board
AT6000 Series FPGAs Prototyping Kit
AT17CXX Series Configurator Programming Kit
Sun-based Tools
Ordering Code
ATDS2100SN
ATDS2120SN
ATDS2130SN
ATDS2140SN
ATDS2150SN
ATDS2160SN
ATDS2170SN
ATDS2180SN
Description
AT6000 Series Physical Design System
AT6000 Physical Design System with Powerview Schematic Entry and Viewlogic Simulator (20K)
Viewlogic Viewsynthesis, ViewSim-VDHL Libraries & Interface for AT6000 Series Design System
Exemplar Libraries & Interface for AT6000 Series Design System
Mentor Libraries & Interface for AT6000 Series Design System
Synopsys Libraries & Interface for AT6000 Series Design System
Cadence Verilog/Concept Libraries & Interface for AT6000 Series Design System
Integraph Libraries & Interface for AT6000 Series Design System
Maintenance Agreements
ATDM2100SN
ATDM2120SN
ATDM2130SN
ATDM2140SN
ATDM2150SN
ATDM2160SN
Maintenance for AT6000 Series Physical Design System
AT6000 Physical Design System with Powerview Schematic Entry and Viewlogic Simulator
Maintenance for (20K)
Maintenance for Viewlogic Viewsynthesis, ViewSim-VDHL Libraries & Interface for AT6000
Series Design System
Maintenance for Exemplar Libraries & Interface for AT6000 Series Design System
Maintenance for Mentor Libraries & Interface for AT6000 Series Design System
Maintenance for Synopsys Libraries & Interface for AT6000 Series Design System
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FPGA Overview
FPGA Overview
Ordering Code
ATDM2170SN
ATDM2180SN
Description
Maintenance for Cadence Verilog/Concept Libraries & Interface for AT6000 Series Design
System
Maintenance for Integraph Libraries & Interface for AT6000 Series Design
University Sun-based Tools
ATDS2100SNU
ATDS2120SNU
University AT6000 Series Physical Design System
University AT6000 Series Physical Design System with Powerview Schematic Entry and
Viewlogic Simulator (20K)
HP-based Tools
Ordering Code
ATDS2100SN
ATDS2120SN
ATDS2130SN
ATDS2140SN
ATDS2150SN
ATDS2160SN
ATDS2170SN
ATDS2180SN
Description
AT6000 Series Physical Design System
AT6000 Physical Design System with Powerview Schematic Entry and Viewlogic Simulator (20K)
Viewlogic Viewsynthesis, ViewSim-VDHL Libraries & Interface for AT6000 Series Design System
Exemplar Libraries & Interface for AT6000 Series Design System
Mentor Libraries & Interface for AT6000 Series Design System
Synopsys Libraries & Interface for AT6000 Series Design System
Cadence Verilog/Concept Libraries & Interface for AT6000 Series Design System
Integraph/Veribest Libraries & Interface for AT6000 Series Design System
Maintenance Agreements
ATDM2100HP
ATDM2120HP
ATDM2130HP
ATDM2140HP
ATDM2150HP
ATDM2160HP
ATDM2170HP
ATDM2180HP
Maintenance for AT6000 Series Physical Design System
AT6000 Physical Design System with Powerview Schematic Entry and Viewlogic Simulator
Maintenance for (20K)
Maintenance for Viewlogic Viewsynthesis, ViewSim-VDHL Libraries & Interface for AT6000
Series Design System
Maintenance for Exemplar Libraries & Interface for AT6000 Series Design System
Maintenance for Mentor Libraries & Interface for AT6000 Series Design System
Maintenance for Synopsys Libraries & Interface for AT6000 Series Design System
Maintenance for Cadence Verilog/Concept Libraries & Interface for AT6000 Series Design
System
Maintenance for Integraph Libraries & Interface for AT6000 Series Design
University HP-based Tools
ATDS2100HPU
ATDS2120HPU
University AT6000 Series Physical Design System
University AT6000 Series Physical Design System with Powerview Schematic Entry and
Viewlogic Simulator (20K)
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