EEWORLDEEWORLDEEWORLD

Part Number

Search

1812Y0500105JXT

Description
CAP CER 1UF 50V X7R 1812
CategoryPassive components   
File Size554KB,6 Pages
ManufacturerKnowles
Websitehttp://www.knowles.com
Environmental Compliance
Download Datasheet Parametric View All

1812Y0500105JXT Overview

CAP CER 1UF 50V X7R 1812

1812Y0500105JXT Parametric

Parameter NameAttribute value
capacitance1µF
Tolerance±5%
Voltage - Rated50V
Temperature CoefficientX7R(2R1)
Operating temperature-55°C ~ 125°C
characteristicSoft terminal
grade-
applicationBoardflex sensitive
failure rate-
Installation typeSurface mount, MLCC
Package/casing1812 (4532 metric)
size/dimensions0.177" long x 0.126" wide (4.50mm x 3.20mm)
Height - Installation (maximum)-
Thickness (maximum)0.098"(2.50mm)
lead spacing-
Lead form-
MLCC
Standard MLCC Ranges
Surface Mount MLC Capacitors
Electrical Details
Capacitance Range
Temperature Coefficient of
Capacitance (TCC)
C0G/NP0
X7R
C0G/NP0
X7R
Insulation Resistance (IR)
Dielectric Withstand Voltage (DWV)
C0G/NP0
X7R
0.47pF to 22µF
0 ± 30ppm/˚C
±15% from -55˚C to +125˚C
Cr > 50pF
≤0.0015
Cr
50pF = 0.0015(15÷Cr+0.7)
0.025
100G or 1000secs (whichever is the less)
Voltage applied for 5 ±1 seconds, 50mA
charging current maximum
Zero
<2% per time decade
A range of dc rated multi-layer chip capacitors from
0.47pF to 22µF and in case sizes 0603 to 8060 in
C0G/NP0 and X7R dielectrics. Suitable for all general
purpose and high reliability applications where package
size and reliability are important. All are manufactured
using Syfer’s unique wet process and incorporate
precious metal electrodes.
Dissipation Factor
Ageing Rate
Range Dimensions – Standard MLCC Ranges
Length
(L1)
mm/inches
1.6 ± 0.2
0.063 ± 0.008
2.0 ± 0.3
0.08 ± 0.012
3.2 ± 0.3
0.126 ± 0.012
3.2 ± 0.3
0.126 ± 0.012
4.5 ± 0.35
0.18 ± 0.014
4.5 ± 0.35
0.18 ± 0.014
4.5 ± 0.35
0.18 ± 0.014
5.7 ± 0.4
0.225 ± 0.016
5.7 ± 0.4
0.225 ± 0.016
9.2 ± 0.5
0.36 ± 0.02
14.0 ± 0.5
0.55 ± 0.02
20.3 ± 0.5
0.8 ± 0.02
Width
(W)
mm/inches
0.8 ± 0.2
0.031 ± 0.008
1.25 ± 0.2
0.05 ± 0.008
1.6 ± 0.2
0.063 ± 0.008
2.5 ± 0.3
0.1 ± 0.012
2.0 ± 0.3
0.08 ± 0.012
3.2 ± 0.3
0.126 ± 0.012
6.30 ± 0.4
0.25 ± 0.016
5.0 ± 0.4
0.197 ± 0.016
6.3 ± 0.4
0.25 ± 0.016
10.16 ± 0.5
0.4 ± 0.02
12.7 ± 0.5
0.5 ± 0.02
15.24 ± 0.5
0.6 ± 0.02
Max. Thickness
(T)
mm/inches
0.8
0.013
1.3
0.051
1.6
0.063
2.0
0.08
2.0
0.08
2.5
0.1
2.5
0.1
4.2
0.16
4.2
0.16
2.5
0.1
4.2
0.16
2.5
0.1
Termination Band
(L2)
mm/inches
min
0.10
0.004
0.13
0.005
0.25
0.01
0.25
0.01
0.25
0.01
0.25
0.01
0.25
0.01
0.25
0.01
0.25
0.01
0.5
0.02
0.5
0.02
0.5
0.02
max
0.40
0.015
0.75
0.03
0.75
0.03
0.75
0.03
1.0
0.04
1.0
0.04
1.0
0.04
1.0
0.04
1.0
0.04
1.5
0.06
1.5
0.06
1.5
0.06
Size
0603
0805
1206
1210
1808
1812
1825
2220
2225
3640
5550
8060
Custom chip sizes not included in the table, but larger than 2225, can be considered with minimum tooling charges. Please refer specific requests direct to the sales office.
Max thickness relates to standard components and actual thickness may be considerably less. Thicker parts, or components with reduced maximum thickness, can be considered by request – please refer
requests to the sales office.
Ordering Information – Standard MLCC Range
1210
Chip Size
0603
0805
1206
1210
1808
1812
1825
2220
2225
3640
5550
8060
Y
Termination
Y
= FlexiCap
TM
termination base with
nickel barrier (100%
matte tin plating).
RoHS compliant.
H
= FlexiCap
termination base with
nickel barrier (tin/lead
plating with min. 10%
lead).
Not RoHS compliant.
F
= Silver Palladium.
RoHS compliant
J
= Silver base with
nickel barrier (100%
matte tin plating).
RoHS compliant
A
= Silver base with
nickel barrier (tin/lead
plating with min. 10%
lead).
Not RoHS compliant
TM
100
Voltage d.c.
(marking code)
010
= 10V
016
= 16V
025
= 25V
050
= 50V
063
= 63V
100
= 100V
200
= 200V
250
= 250V
500
= 500V
630
= 630V
1K0
= 1kV
1K2
=1.2kV
1K5
=1.5kV
2K0
= 2kV
2K5
=2.5kV
3K0
=3kV
4K0
=4kV
5K0
=5kV
6K0
=6kV
8K0
=8kV
10K
=10kV
12K
=12kV
0103
Capacitance in Pico
farads (pF)
<1.0pF
Insert a P for the decimal
point as the first character.
e.g.,
P300
= 0.3pF
Values in 0.1pF steps
≥1.0pF
& <10pF
Insert a P for the decimal
point as the second
character.
e.g.,
8P20
= 8.2pF
Values are E24 series
≥10pF
First digit is 0.
Second and third digits are
significant figures of
capacitance code.
The fourth digit is the
number of zeros following.
e.g.,
0101
= 100 pF
Values are E12 series
J
Capacitance
Tolerance
H:
± 0.05pF
(only available for
values <4.7pF)
<10pF
B:
± 0.10pF
C:
± 0.25pF
D:
± 0.5pF
F:
± 1.0pF
≥10pF
F:
± 1%
G:
± 2%
J:
± 5%
K:
± 10%
M:
± 20%
X
Dielectric
Codes
C
= C0G/NP0
(1B)
X
= X7R
(2R1)
P
= X5R
T
Packaging
T
= 178mm
(7”) reel
R
= 330mm
(13”) reel
B
= Bulk pack
– tubs or trays

Suffix Code
Used for specific
customer
requirements
© Knowles 2014
StandardMLCCDatasheet Issue 4 (P109801) Release Date 04/11/14
Page 1 of 6
Tel: +44 1603 723300 | Email SyferSales@knowles.com | www.knowlescapacitors.com/syfer
Beijing's well-known communications group recruits DSP software engineers
DSP software engineer annual salary 16W-19W Job responsibilities: 1. Responsible for the verification and implementation of the physical layer algorithm of McWiLL broadband wireless access system, inc...
e1065037772 Recruitment
W5300
Looking for W5300 component package chips available in AD software...
一花一世界0215 PCB Design
Communication Protocol
Is the duration of high and low levels during the transmission of a communication protocol fixed? For example, if I want to make a board that converts two protocols, can I just connect the ports requi...
zhonghuadianzie PCB Design
Interrupt button anti-shake problem
I set an interrupt button, which is triggered by a low level, but the button is jittery, and pressing the button triggers several interrupt programs? How can I solve this problem?...
a12355x MCU
Texas Instruments' Da Vinci: Seven deadly sins in five years; the battle for embedded processor architecture to be decided in 2012 (Part 3)
2008 was destined to be an extraordinary year. TI may have realized that in such a magical land as China, there is such an unspoken rule, that is, only hardware can be sold, and everything running on ...
VampireDaVinci DSP and ARM Processors
EMwin transplants the settings of the external window border of VisualStudio
[table] [tr][td]EMwin transplants the setting of VisualStudio external window border=============================== Is there anyone who knows how to adjust this border================================ ...
wlq19911021 stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 989  2395  951  1661  1146  20  49  34  24  28 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号