White Electronic Designs
512Kx32 SRAM MODULE, SMD 5962-94611
FEATURES
■
■
Access Times of 70, 85, 100, 120ns
Packaging
• 68 lead, Hermetic CQFP (G2T)
1
, 22.4mm (0.880
inch) square. 4.57mm (0.180 inch) high (Package
509)
■
■
■
Organized as 512Kx32, User Configurable as
1Mx16 or 2Mx8
Commercial, Industrial and Military Temperature
Ranges
TTL Compatible Inputs and Outputs
■
■
■
■
5V Power Supply
Low Power CMOS
WS512K32-XXX
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
• WS512K32-XG2TX
1
- 8 grams typical
Note 1: Package Not Recommended for New Designs.
This product is subject to change without notice.
FIGURE 1 – PIN CONFIGURATION FOR WS512K32-XG2TX
1
TOP VIEW
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS#
3
GND
CS#
4
WE#
1
A
6
A
7
A
8
A
9
A
10
V
CC
PIN DESCRIPTION
I/O0-31
A0-18
WE#1-4
CS#1-4
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
BLOCK DIAGRAM
W E #
1
CS#
1
OE#
A
0-18
W E #
2
CS#
2
W E #
3
CS#
3
W E #
4
CS#
4
A
16
CS#
1
OE#
CS#
2
A
17
WE#
2
WE#
3
WE#
4
A
12
A
13
A
14
A
15
V
CC
A
18
A
11
NC
NC
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
8
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
Note 1: Package Not Recommended for New Designs.
March 2005
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
V
G
T
J
V
CC
-0.5
Min
-55
-65
-0.5
Max
+125
+150
V
CC
+0.5
150
7.0
Unit
°C
°C
V
°C
V
WS512K32-XXX
CAPACITANCE
T
A
= +25°C
Parameter
Symbol Conditions
Max Unit
OE# capacitance
C
OE
V
IN
= 0 V, f = 1.0 MHz 50 pF
WE#
1-4
capacitance
C
WE
V
IN
= 0 V, f = 1.0 MHz 15 pF
CQFP G2T
CS#
1-4
capacitance
C
CS
V
IN
= 0 V, f = 1.0 MHz 20 pF
Data I/O capacitance
C
I/O
V
I/O
= 0 V, f = 1.0 MHz 20 pF
Address input capacitance
C
AD
V
IN
= 0 V, f = 1.0 MHz 50 pF
This parameter is guaranteed by design but not tested.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp (Mil)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.5
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
LOW CAPACITANCE CQFP
T
A
= +25°C
Parameter
OE# capacitance
CQFP G4 capacitance
CS#1-4 capacitance
Symbol
C
OE
C
WE
C
CS
C
I/O
C
AD
Conditions
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
V
I/O
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
Max Unit
32
32
15
15
32
pF
pF
pF
pF
pF
TRUTH TABLE
CS#
H
L
L
L
OE#
X
L
H
X
WE#
X
H
H
L
Mode
Standby
Read
Out Disable
Write
Data I/O
High Z
Data Out
High Z
Data In
Power
Standby
Active
Active
Active
Data I/O capacitance
Address input capacitance
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C to +125°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current x 32 Mode
Standby Current
Output Low Voltage
Output High Voltage
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
Symbol
I
LI
I
LO
I
CC
x 32
I
SB
V
OL
V
OH
Conditions
V
CC
= 5.5, V
IN
= GND to V
CC
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND to V
CC
CS# = V
IL
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
CS# = V
IH
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
I
OL
= 2.1mA, V
CC
= 4.5
I
OH
= -1.0mA, V
CC
= 4.5
2.4
Min
Max
10
10
200
4.0
0.4
Units
µA
µA
mA
mA
V
V
DATA RETENTION CHARACTERISTICS
(T
A
= -55°C to +125°C)
Parameter
Data Retention Supply Voltage
Data Retention Current
Symbol
V
DR
I
CCDR1
Conditions
CS#
≥
V
CC
-0.2V
V
CC
= 3V
Min
2.0
0.4
Typ
Max
5.5
1.6
Units
V
mA
March 2005
Rev. 4
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
AC CHARACTERISTICS
V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C to +125°C
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
1. This parameter is guaranteed by design but not tested.
Symbol
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
1
1
WS512K32-XXX
-70
Min
70
70
5
70
35
10
5
25
25
10
5
5
Max
Min
85
-85
Max
85
5
85
40
10
5
25
25
Min
100
-100
Max
100
5
100
50
10
5
35
35
Min
120
-120
Max
120
120
60
Units
ns
ns
ns
ns
ns
ns
ns
t
OLZ
t
CHZ
35
35
ns
ns
t
OHZ
1
AC CHARACTERISTICS
V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C to +125°C
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold from Write Time
1. This parameter is guaranteed by design but not tested.
Symbol
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
1
-15*
Min
70
60
60
30
50
0
5
5
25
0
0
Max
Min
85
75
75
30
50
0
5
5
-17
Max
Min
100
80
80
40
60
0
5
5
25
0
-20
Max
Min
120
100
100
40
60
0
5
5
35
0
-25
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
t
WHZ
t
DH
35
ns
ns
FIGURE 2 – AC TEST CIRCUIT
Parameter
AC TEST CONDITIONS
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
Unit
V
ns
V
Input Pulse Levels
Current Source
I
OL
Input Rise and Fall
Input and Output Reference Level
D.U.T.
C
eff
+50pf
V
Z
1.5V
(Bipolar Supply)
Output Timing Reference Level
1.5
V
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Current Source
I
OH
March 2005
Rev. 4
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FIGURE 3 – TIMING WAVEFORM - READ CYCLE
WS512K32-XXX
t
RC
ADDRESS
t
RC
ADDRESS
t
AA
CS#
t
AA
t
ACS
t
CHZ
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
OE#
t
CLZ
t
OE
t
OLZ
DATA I/O
HIGH IMPEDANCE
t
OHZ
DATA VALID
READ CYCLE 1 (CS# = OE# = V
IL
, WE# = V
IH
)
READ CYCLE 2 (WE# = V
IH
)
FIGURE 4 – WRITE CYCLE - WE# CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS#
t
AS
WE#
t
WHZ
DATA I/O
t
DW
t
WP
t
OW
t
DH
t
AH
DATA VALID
WRITE CYCLE 1, WE# CONTROLLED
FIGURE 5 – WRITE CYCLE - CS# CONTROLLED
t
WC
ADDRESS
t
AW
t
AS
CS#
t
WP
WE#
t
DW
DATA I/O
DATA VALID
WRITE CYCLE 2, CS# CONTROLLED
t
DH
t
CW
t
AH
March 2005
Rev. 4
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WS512K32-XXX
PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T)
1
25.15 (0.990) ± 0.26 (0.010) SQ
22.36 (0.880) ± 0.26 (0.010) SQ
4.57 (0.180) MAX
0.27 (0.011) ± 0.04 (0.002)
0.25 (0.010) REF
24.03 (0.946) ±
0.26 (0.010)
1° / 7°
R 0.25
(0.010)
0.19 (0.007) ±
0.06 (0.002)
1.0 (0.040) ±
0.127 (0.005)
23.87
(0.940) REF
DETAIL A
1.27 (0.050) TYP
0.38 (0.015) ± 0.05 (0.002)
SEE DETAIL “A”
20.3 (0.80) REF
Note 1: Package Not Recommended for New Designs.
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
March 2005
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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