datasheet
EEWORLDEEWORLDEEWORLD
Datasheet
Part Number

Keyword

Search
Keyword

Part Number

Search
Datasheet> All Categories > storage> WF512K32N-120G2UQ5A
PDF
Preview

WF512K32N-120G2UQ5A

Description
512K X 32 FLASH 5V PROM MODULE, 90 ns, CPGA66
Categorystorage   
File Size503KB，16 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

WF512K32N-120G2UQ5A Overview

512K X 32 FLASH 5V PROM MODULE, 90 ns, CPGA66

WF512K32N-120G2UQ5A Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals66
Minimum operating temperature-55 Cel
Maximum operating temperature125 Cel
Rated supply voltage5 V
Minimum supply/operating voltage4.5 V
Maximum supply/operating voltage5.5 V
Processing package description1.075 X 1.075 INCH, HERMETIC SEALED, CERAMIC, HIP-66
stateTransferred
ypeNOR TYPE
sub_categoryFlash Memories
ccess_time_max90 ns
data_pollingYES
jesd_30_codeS-CPGA-P66
jesd_609_codee0
storage density1.68E7 bi
Memory IC typeFLASH MODULE
Spare memory width16
moisture_sensitivity_levelNOT SPECIFIED
umber_of_sectors_size32
Number of digits524288 words
Number of digits512K
operating modeASYNCHRONOUS
organize512KX32
Packaging MaterialsCERAMIC, METAL-SEALED COFIRED
ckage_codePGA
ckage_equivalence_codePGA66,11X11
packaging shapeSQUARE
Package SizeGRID ARRAY
serial parallelPARALLEL
eak_reflow_temperature__cel_NOT SPECIFIED
wer_supplies__v_5
gramming_voltage__v_5
qualification_statusCOMMERCIAL
screening_level38535Q/M;38534H;883B
seated_height_max4.6 mm
sector_size__words_16K
standby_current_max0.0065 Am
Maximum supply voltage0.2400 Am
surface mountNO
CraftsmanshipCMOS
Temperature levelMILITARY
terminal coatingTIN LEAD
Terminal formPIN/PEG
Terminal spacing2.54 mm
Terminal locationPERPENDICULAR
ime_peak_reflow_temperature_max__s_NOT SPECIFIED
ggle_biNO
length27.3 mm
width27.3 mm
dditional_featureUSER CONFIGURABLE AS 2M X 8

WF512K32N-120G2UQ5A Preview

White Electronic Designs
WF512K32-XXX5
512Kx32 5V FLASH MODULE, SMD 5962-94612
FEATURES
Access Times of 60, 70, 90, 120, 150ns
Packaging
•
•
•
•
•
66 pin, PGA Type, 1.075" square, Hermetic
Ceramic HIP (Package 400
(1)
).
68 lead, 40mm, Low Capacitance Hermetic
CQFP (Package 501)
1
68 lead, 40mm, Low Profile 3.5mm (0.140"),
CQFP (Package 502)
1
68 lead, 22.4mm (0.880") Low Profile CQFP
(G2U) 3.5mm (0.140") high, (Package 510)
1
68 lead, 22.4mm (0.880") CQFP (G2L) 5.08mm
(0.200") high, Package (528)
Commercial, Industrial and Military Temperature
Ranges
5 Volt Programming. 5V ± 10% Supply.
Low Power CMOS, 6.5mA Standby
Embedded Erase and Program Algorithms
TTL Compatible Inputs and CMOS Outputs
Built-in Decoupling Caps for Low Noise Operation
Page Program Operation and Internal Program
Control Time
Weight
WF512K32 - XG2UX5 - 8 grams typical
WF512K32N - XH1X5 - 13 grams typical
WF512K32 - XG4TX5
1
- 20 grams typical
WF512K32-XG2LX5 - 8 grams typical
* This product is subject to change without notice.
Note 1: Package Not Recommended for New Design
See Flash Programming Application Note 4M5 for algorithms.
1,000,000 Erase/Program Cycles Minimum
Sector Architecture
•
•
8 equal size sectors of 64KBytes each
Any combination of sectors can be concurrently
erased. Also supports full chip erase
Organized as 512Kx32
FIGURE 1 – PIN CONFIGURATION FOR WF512K32N-XH1X5
Top View
1
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
11
22
12
WE
2
#
CS
2
#
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
#
NC
I/O
3
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
17
WE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
#
WE
4
#
I/O
27
A
4
A
5
A
6
WE
3
#
CS
3
#
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
56
Pin Description
I/O
0-31
A
0-18
WE
1-4
#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Block Diagram
A
3
WE
1
# CS
1
#
WE
2
# CS
2
#
WE
3
# CS
3
#
WE
4
# CS
4
#
I/O
23
I/O
22
I/O
21
OE#
A
0-18
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
8
I/O
20
66
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
March 2006
Rev. 11
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WF512K32-XXX5
FIGURE 2 – PIN CONFIGURATION FOR WF512K32-XG4TX5
1
Top View
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
1
#
GND
CS
3
#
WE#
A
6
A
7
A
8
A
9
A
10
V
CC
Pin Description
I/O
0-31
A
0-18
WE#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
Block Diagram
CS
1
#
WE#
OE#
A
0-18
CS
2
#
CS
3
#
CS
4
#
512K X 8
512K X 8
512K X 8
512K X 8
CS
2
#
OE#
CS
4
#
V
CC
A
12
A
13
A
14
A
15
A
16
A
17
A
18
A
11
NC
NC
NC
NC
NC
8
8
8
8
I/O
0 - 7
I/O
8 - 15
I/O
16 - 23
I/O
24 - 31
Note 1: Package not recommended for new designs
FIGURE 3 – PIN CONFIGURATION FOR WF512K32-XG2UX5 AND WF512K32-XG2LX5
Top View
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
#
GND
CS
4
#
WE
1
#
A
6
A
7
A
8
A
9
A
10
V
CC
Pin Description
I/O
0-31
A
0-18
WE
1-4
#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
#
OE#
CS
2
#
A
17
WE
2
#
WE
3
#
WE
4
#
A
18
NC
NC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
Block Diagram
WE
1
# CS
1
#
WE
2
# CS
2
#
WE
3
# CS
3
#
WE
4
# CS
4
#
OE#
A
0-18
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
8
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
March 2006
Rev. 11
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
Absolute Maximum Ratings (1)
Parameter
Unit
WF512K32-XXX5
CAPACITANCE
T
A
= +25°C
Parameter
OE# capacitance
WE
1-4
# capacitance
HIP (PGA)
CQFP G4T
CQFP G2U/G2L
CS
1-4
# capacitance
Data# I/O capacitance
Address input capacitance
Symbol
Conditions
C
OE
V
IN
= 0V, f = 1.0 MHz
C
WE
V
IN
= 0V, f = 1.0 MHz
Max Unit
50 pF
pF
20
50
15
V
IN
= 0V, f = 1.0 MHz 20 pF
V
I/O
= 0V, f = 1.0 MHz 20 pF
V
IN
= 0V, f = 1.0 MHz 50 pF
Operating Temperature
Supply Voltage Range (V
CC
)
Signal voltage range (any pin except A9) (2)
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
Data Retention (Mil Temp)
Endurance - write/erase cycles (Mil Temp)
A9 Voltage for sector protect (V
ID
) (3)
-55 to +125
°C
-2.0 to +7.0
V
-2.0 to +7.0
V
-65 to +150
°C
+300
°C
20 years
1,000,000 cycles min.
-2.0 to +14.0
V
NOTES:
1. Stresses above the absolute maximum rating may cause permanent damage to the
device. Extended operation at the maximum levels may degrade performance and
affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,inputs
may overshoot Vss to -2.0 V for periods of up to 20ns. Maximum DC voltage on
output and I/O pins is Vcc + 0.5V. During voltage transitions, outputs may overshoot
to Vcc + 2.0 V for periods of up to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may
overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is
+13.5V which may overshoot to 14.0 V for periods up to 20ns.
C
CS
C
I/O
C
AD
This parameter is guaranteed by design but not tested.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Operating Temp. (Ind.)
A
9
Voltage for Sector Protect
Symbol
V
CC
V
IH
V
IL
T
A
T
A
V
ID
Min
4.5
2.0
-0.5
-55
-40
11.5
Max
5.5
V
CC
+ 0.5
+0.8
+125
+85
12.5
Unit
V
V
V
°C
°C
V
DC CHARACTERISTICS
V
CC
= 5.0V, V
SS
= 0V, -55°C
≤
T
A
≤
+125°C
Parameter
Input Leakage Current
Output Leakage Current
V
CC
Active Current for Read (1)
V
CC
Active Current for Program or Erase (2)
V
CC
Standby Current
V
CC
Static Current
Output Low Voltage
Output High Voltage
Low V
CC
Lock-Out Voltage
Sym
I
LI
I
LOx32
I
CC1
I
CC2
I
CC4
I
CC3
V
OL
V
OH1
V
LKO
Conditions
V
CC
= 5.5, V
IN
= GND to V
CC
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND to V
CC
CS# = V
IL
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
CS# = V
IH
, OE# = V
IH
V
CC
= 5.5, CS = V
IH
, f = 5MHz
V
CC
= 5.5, CS = V
IH
I
OL
= 8.0mA, V
CC
= 4.5
I
OH
= 2.5mA, V
CC
= 4.5
Min
Max
10
10
190
240
6.5
0.6
0.45
Units
µA
µA
mA
mA
mA
mA
V
V
0.85
X
V
CC
3.2
4.2
V
DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
NOTES:
1. The I
CC
current listed includes both the DC operating current and the frequency dependent component
(at 5 MHz). The frequency component typically is less than 2 mA/MHz, with OE at V
IH
.
2. I
CC
active while Embedded Algorithm (program or erase) is in progress.
March 2006
Rev. 11
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
V
CC
= 5.0V, GND = 0V, -55°C
≤
T
A
≤
+125°C
Parameter
Write Cycle Time
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
Chip Programming Time
Chip Erase Time (3)
NOTES:
1. Typical value for t
WHWH1
is 7µs.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase Time is 8sec.
Symbol
Min
t
AVAV
t
WLEL
t
ELEH
t
AVEL
t
DVEH
t
EHDX
t
ELAX
t
EHEL
t
WHWH1
t
WHWH2
t
GHEL
0
11
64
t
WC
t
WS
t
CP
t
AS
t
DS
t
DH
t
AH
t
CPH
60
0
40
0
40
0
40
20
300
15
0
11
64
-60
Max
Min
70
0
45
0
45
0
45
20
300
15
0
11
64
-70
Max
Min
90
0
45
0
45
0
45
20
300
15
-90
Max
WF512K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
-120
Min
120
0
50
0
50
0
50
20
300
15
0
11
64
0
11
64
Max
Min
150
0
50
0
50
0
50
20
300
15
-150
Max
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ns
sec
sec
Unit
FIGURE. 4 – AC TEST CIRCUIT
AC Test Conditions
I
OL
Current Source
D.U.T.
C
eff
= 50 pf
V
Z
1.5V
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
(Bipolar Supply)
I
OH
Current Source
Notes:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
March 2006
Rev. 11
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
V
CC
= 5.0V, GND = 0V, -55°C
≤
T
A
≤
+125°C
Parameter
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time before Write
VCC Set-up Time
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (4)
Chip Erase Time (3)
NOTES:
1. Typical value for t
WHWH1
is 7µs.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase Time is 8sec.
4. For Toggle and Data Polling.
t
OES
t
OEH
0
10
64
Symbol
Min
t
AVAV
t
ELWL
t
WLWH
t
AVWH
t
DVWH
t
WHDX
t
WHAX
t
WHWL
t
WHWH1
t
WHWH2
t
GHWL
t
VCS
0
50
11
0
10
64
t
WC
t
CS
t
WP
t
AS
t
DS
t
DH
t
AH
t
WPH
60
0
40
0
40
0
40
20
300
15
0
50
11
0
10
64
-60
Max
Min
70
0
45
0
45
0
45
20
300
15
0
50
11
-70
Max
Min
90
0
45
0
45
0
45
20
300
15
-90
Max
WF512K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,WE# CONTROLLED
-120
Min
120
0
50
0
50
0
50
20
300
15
0
50
11
0
10
64
0
10
64
0
50
11
Max
Min
150
0
50
0
50
0
50
20
300
15
-150
Max
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ns
µs
sec
ns
ns
sec
Unit
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,WE# CONTROLLED
V
CC
= 5.0V, -55°C
≤
T
A
≤
+125°C
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output High Z (1)
Output Enable High to Output High Z (1)
Output Hold from Address, CS# or OE#
Change, whichever is First
1. Guaranteed by design, but not tested
Symbol
Min
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
t
RC
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
0
60
60
60
30
20
20
0
-60
Max
Min
70
70
70
35
20
20
0
-70
Max
Min
90
90
90
35
20
20
0
-90
Max
Min
120
120
120
50
30
30
0
-120
Max
Min
150
150
150
55
35
35
-150
Max
ns
ns
ns
ns
ns
ns
ns
Unit
March 2006
Rev. 11
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

Recommended Resources

Temperature switch circuit 2

Flashing Light Controller (1)

Electronic machine gun circuit

C523 double column vertical lathe control circuit 01

Optoelectronic servo circuit for tracking the sun used in chromospheric telescopes

875p computer motherboard circuit diagram_089

MSP430F5438 Study Notes UART ACLK 9600-8-N-1
1. Before initializing UART0, you need to initialize ACLK, SMCLK and MCLK. In the sample code, XT1 is used, ACLK is 32768, and SMCLK and MCLK are about 8MHZ. 2. The clock of UART can refer to ACLK or ...
fish001 Microcontroller MCU
Sincerely ask about open at development issues, please come in and take a look.
I am new to wireless communication and I am using the Q24PL module to do some applications. I have a book in my hand.. I program in the open at development environment. I only knew pure C before. Now ...
baandmaandme Embedded System
[Original article] 【R7F0C809】External interrupt to change LED flashing frequency
[i=s]This post was last edited by wgsxsm on 2015-9-29 22:42[/i] It has been a month since the last post. Although I have not been studying this board all the time, I have spent a lot of time on it. It...
wgsxsm Renesas Electronics MCUs
CAB installation package modifies the registry
Hello everyone, I need to package a .dll file and install it to the device, and modify the registry at the same time. My .inf file is already written, and can generate .cab file correctly, but now I d...
ryzhou Embedded System
The difference between Buffer and Cache
[size=5] [/size][size=5]1. Cache: Cache is a high-speed cache, which is a small but fast storage located between the CPU and the main memory. Because the speed of the CPU is much higher than the speed...
白丁 FPGA/CPLD
[Evaluation of Motor Kit P-NUCLEO-IHM]-3.1. Task check-in (basic tasks and self-assessment tasks)
[i=s]This post was last edited by yang_alex on 2018-7-4 13:53[/i] Having said so much before, let me quickly summarize the tasks I have completed: [b]Task 1: When the motor is running, use P-NUCLEO-IH...
yang_alex stm32/stm8
Shortcut:   L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components

  1. SMLJ28A
  2. 7101P3H3CQE
  3. FW-30-02-G-D-250-300
  4. 1600HGH1509C3UB
  5. PH1-MLAFA3245
  6. BU-61588F3-202
  7. TAZD155K025CSLC9H00
  8. 1812N911J500VX100T
  9. AME8855ABGA090
  10. MMBZ5221B_10
  11. BZQ5266
  12. UF204G_B0_10001

Popular Articles

  1. Design of a cost-effective milliohm meter based on STM8 master control
  2. Mendix Intelligent Solutions Introduces Business Events and Enhances Artificial Intelligence and Machine Learning
  3. WPG World Peace Group launches power supply solution for epidemic prevention medical equipment based on Onsemi products
  4. Mi Rabbit Children's Phone Watch 5C Disassembly: Domestic children's watches of course use domestic chips
  5. With so many competitors competing, who will have the last laugh in the smart car industry?
  6. Intel plans to invest 80 billion euros in Europe to expand production in order to expand its automotive chip business
  7. 4412 RS485
  8. Galaxy S22 Ultra is exposed again with rear quad-camera + laser autofocus
  9. Samsung Electronics to showcase 13 innovative technologies from C-Lab at CES 2022
  10. Security mechanisms using DDS middleware in software-defined cars

Technical ResourceMore

  1. UM0412 DFUSE USB device firmware upgrade function extension document
  2. CDMA technical information
  3. Altium Designer 6 schematic component library collection
  4. Telephone Remote Control System Designed by FPGA
  5. Design of Display Driver for Handheld Digital Storage Oscilloscope Based on FPGA
  6. Multimedia Solutions Based on OMAP2 and OMAP3
  7. Haier circuit diagram
  8. Smart car microcontroller program and report + flow chart + pin description
  9. Capture to Allegro Interface
  10. Clocks and Timing Guide - Texas Instruments

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

About Us Customer Service Contact Information Datasheet Sitemap LatestNews
Index Files: 1089  136  671  483  1849  22  3  14  10  38 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号