Data Sheet
FEATURES
5.5 V, 5 A/6 A, High Efficiency, Step-Down
DC-to-DC Regulators with Output Tracking
ADP2165/ADP2166
TYPICAL APPLICATION CIRCUIT
V
PVIN
C
IN
PVIN
AVIN
EN
PGOOD
R
RT
C
VREG
SYNC
RT
TRK
VREG
GND
PGND
SS
FB
COMP
C
CP
C
SS
R
C
Continuous output current
ADP2165:
5 A
ADP2166:
6 A
Integrated MOSFET
High-side on resistance: 19 mΩ
Low-side on resistance: 15 mΩ
Reference voltage: 0.6 V ± 1% over temperature range
Input voltage range: 2.7 V to 5.5 V
Current mode architecture
Switching frequency
Fixed frequency: 620 kHz or 1.2 MHz
Adjustable frequency: 250 kHz to 1.4 MHz
Synchronizes to external clock: 250 kHz to 1.4 MHz
Selectable synchronize phase shift: in phase or out of phase
External compensation
Programmable soft start
Startup into a precharged output
Voltage tracking input
Power-good output and precision enable input
Accurate current limit
Available in 24-lead, 4 mm × 4 mm LFCSP package
Supported by
ADIsimPower™ design tool
ADP2165/
ADP2166
BST
C
BST
SW
R
TOP
L1
V
OUT
C
OUT
R
BOT
10956-001
C
C
Figure 1.
The
ADP2165/ADP2166
are designed to be extremely flexible
with the addition of a minimal amount of external components
to program soft start and control loop compensation.
The
ADP2165/ADP2166
are supplied from an input voltage of
2.7 V to 5.5 V. Output voltage options include 3.3 V, 2.5 V, 1.8 V,
1.5 V, 1.2 V, or 1.0 V fixed outputs and adjustable options capable
of supporting an output voltage range from 0.6 V to 90% of the
input voltage. Protection features include undervoltage lockout
(UVLO), overvoltage protection (OVP), overcurrent protection
(OCP), and thermal shutdown (TSD) for robust performance.
The
ADP2165/ADP2166
operate over the −40°C to +125°C
junction temperature range and are available in a 24-lead
LFCSP package.
100
V
PVIN
= 3.3V
95
90
V
PVIN
= 5V
85
EFFICIENCY (%)
APPLICATIONS
Point of load regulation
Communications and networking
High end consumer
Industrial, instrumentation, and healthcare
GENERAL DESCRIPTION
The
ADP2165/ADP2166
are high efficiency, current mode
control, step-down dc-to-dc regulators with an integrated 19 mΩ
high-side FET and a 15 mΩ synchronous rectified FET. The
ADP2165/ADP2166
combine a small size, 4 mm × 4 mm LFCSP
package with an accurate current limit, resulting in a smaller
inductor size and a high power density, point of load solution.
Key features include precision enable, power-good monitor,
and output voltage tracking to facilitate robust sequencing.
The switching frequency can be programmed from 250 kHz
to 1.4 MHz, or it can be fixed at 620 kHz or 1.2 MHz. The
synchronization function allows the switching frequency to
synchronize to an external clock, minimizing the
electromagnetic interference (EMI) of the system.
80
75
70
65
60
55
50
0
1
2
3
4
OUTPUT CURRENT (A)
V
OUT
= 1.8V
f
SW
= 600kHz
5
6
10956-002
Figure 2. Efficiency vs. Output Current
Rev. B
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ADP2165/ADP2166
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Typical Application Circuit ............................................................. 1
Revision History ............................................................................... 2
Functional Block Diagram .............................................................. 3
Specifications..................................................................................... 4
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 12
Control Scheme .......................................................................... 12
PWM Mode ................................................................................. 12
Enable/Shutdown ....................................................................... 12
Internal Regulator (VREG) ....................................................... 12
Bootstrap Circuitry .................................................................... 12
Oscillator and Synchronization ................................................ 12
Soft Start ...................................................................................... 13
Tracking ....................................................................................... 13
Power-Good (PGOOD) ............................................................. 13
Peak Current-Limit and Short-Circuit Protection................. 13
Overvoltage Protection .............................................................. 13
Data Sheet
Undervoltage Lockout ............................................................... 13
Thermal Shutdown .................................................................... 13
Applications Information .............................................................. 14
ADIsimPower Design Tool ....................................................... 14
Input Capacitor Selection .......................................................... 14
Output Voltage Setting .............................................................. 14
Voltage Conversion Limitations ............................................... 14
Inductor Selection ...................................................................... 15
Output Capacitor Selection....................................................... 15
Compensation Design ............................................................... 16
Design Example .............................................................................. 17
Output Voltage Setting .............................................................. 17
Frequency Setting ....................................................................... 17
Inductor Selection ...................................................................... 17
Output Capacitor Selection....................................................... 18
Compensation Components ..................................................... 18
Soft Start Time Program ........................................................... 18
Input Capacitor Selection .......................................................... 18
Recommended External Components .................................... 19
Printed Circuit Board Layout Recommendations ..................... 20
Reference Designs .......................................................................... 21
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 23
REVISION HISTORY
8/2017—Rev. A to Rev. B
Changed LFCSP_WQ to LFCSP ..........................................Throughout
Updated Outline Dimensions ................................................................. 23
Changes to Ordering Guide..................................................................... 23
9/2016—Rev. 0 to Rev. A
Change to Compensation Components Section ........................ 18
Change to Table 8 ........................................................................... 19
8/2014—Revision 0: Initial Version
Rev. B | Page 2 of 23
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
EN
1.2V
EN_BUF
UVLO
ADP2165/ADP2166
PVIN
A
CS
+
OCP
–
HICCUP
MODE
V
PVIN
NFET1
DRIVER
SW
CONTROL
LOGIC
BST
SLOPE RAMP
COMP
I
SS
SS
TRK
FB
0.6V
+
+
+
–
0.7V
–
+
–
+
AMP
Σ
I
MAX
+
CMP
–
CLK
OVP
V
PVIN
NFET2
DRIVER
PGND
NEG CURRENT
+
CMP
–
0.66V
–
0.54V
PGOOD
+
I
NEG
AVIN
DEGLITCH
EN_BUF
SYNC
OSC
RT
CLK
SLOPE RAMP
3.3V
REGULATOR
VREG
GND
10956-018
Figure 3.
ADP2165/ADP2166
Functional Block Diagram
Rev. B | Page 3 of 23
ADP2165/ADP2166
SPECIFICATIONS
Data Sheet
V
PVIN
= V
AVIN
= 5 V, T
J
= −40°C to +125°C for minimum/maximum specifications, and T
A
= 25°C for typical specifications, unless otherwise
noted.
Table 1.
Parameter
PVIN AND AVIN
V
PVIN
Voltage Range
V
AVIN
Voltage Range
Quiescent Current
Shutdown Current
V
AVIN
Undervoltage Lockout Threshold
FB
FB Regulation Voltage
Fixed Output Version
FB Bias Current
ERROR AMPLIFIER (EA)
Transconductance
EA Source Current
EA Sink Current
INTERNAL REGULATOR (VREG)
VREG Voltage
Dropout Voltage
Regulator Current Limit
SW
High-Side On Resistance
1
Low-Side On Resistance
1
High-Side Peak Current Limit
Low-Side Negative Current Limit
SW Minimum Off Time
2
SW Minimum On Time
2
OSCILLATOR (RT)
Switching Frequency
Symbol
V
PVIN
V
AVIN
I
Q
I
SHDN
UVLO
Test Conditions/Comments
Min
2.7
2.7
No switching, f
SW
= 600 kHz
EN = 0 V
V
AVIN
rising
V
AVIN
falling
V
PVIN
= 2.7 V to 5.5 V
2
25
2.6
2.5
0.6
0.01
430
500
75
85
3.3
140
50
19
22
15
16
8
9
2.4
100
100
620
1.2
590
Typ
Max
5.5
5.5
10
150
2.7
Unit
V
V
mA
µA
V
V
V
%
µA
µS
µA
µA
V
mV
mA
mΩ
mΩ
mΩ
mΩ
A
A
A
ns
ns
kHz
MHz
kHz
kHz
kHz
ns
ns
V
V
µA
mV
mV
nA
2.35
0.594
−1
V
FB
V
OUT
I
FB
g
m
I
SOURCE
I
SINK
0.606
+1
0.1
570
3.1
I
VREG
= 10 mA
3.5
V
BST
− V
SW
= 5 V
V
BST
− V
SW
= 3.3 V
V
PVIN
= 5 V
V
PVIN
= 3.3 V
ADP2165
ADP2166
t
OFF_MIN
t
ON_MIN
f
SW
RT pin floating
RT pin connected to VREG
R
RT
= 95.3 kΩ
6.5
7.5
29
34
23
26
9.5
10.5
Switching Frequency Range
SYNC
Synchronization Range
SYNC Minimum Pulse Width
SYNC Minimum Off Time
SYNC Input High Voltage
SYNC Input Low Voltage
SOFT START (SS)
SS Pull-Up Current
TRK
TRK Input Voltage Range
TRK-to-FB Offset Voltage
TRK Input Bias Current
525
1.08
500
250
250
100
100
1.3
715
1.32
680
1400
1400
0.4
I
SS
2.7
0
−9
3.5
4.3
600
+9
100
TRK = 300 mV to 500 mV
Rev. B | Page 4 of 23
Data Sheet
Parameter
PGOOD
Power-Good Range
Symbol
Test Conditions/Comments
FB rising threshold
FB rising hysteresis
FB falling threshold
FB falling hysteresis
From FB to PGOOD
V
PGOOD
= 5 V
I
PGOOD
= 1 mA
Min
107
87
ADP2165/ADP2166
Typ
111
3
90.5
3
16
0.1
27
1.2
100
1
150
25
Max
115
94.5
Unit
%
%
%
%
Clock cycles
µA
mV
V
mV
MΩ
°C
°C
Power-Good Deglitch Time
PGOOD Leakage Current
PGOOD Output Low Voltage
EN
EN Threshold
EN Hysteresis
EN Pull-Down Resistor
THERMAL
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
1
2
1
45
1.28
1.12
Pin-to-pin measurement.
Guaranteed by design.
Rev. B | Page 5 of 23
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