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Datasheet> All Categories > storage> storage> W3EG7234S202JD3
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W3EG7234S202JD3

Description
256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL
Categorystorage    storage   
File Size389KB，14 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
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W3EG7234S202JD3 Overview

256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL

W3EG7234S202JD3 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionDIMM,
Reach Compliance Codeunknow
access modeFOUR BANK PAGE BURST
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N184
memory density2415919104 bi
Memory IC TypeDDR DRAM MODULE
memory width72
Number of functions1
Number of ports1
Number of terminals184
word count33554432 words
character code32000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32MX72
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED

W3EG7234S202JD3 Preview

White Electronic Designs
W3EG7234S-D3
-JD3
-AJD3
PRELIMINARY*
256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL
FEATURES
Double-data-rate architecture
Clock speeds: 100MHz and 133MHz
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power Supply: 2.5V ± 0.20V
JEDEC standard 184 pin DIMM package
•
Package height options:
JD3: 30.48mm (1.20")
AJD3: 28.70mm (1.13")
* This product is under development, is not qualified or characterized and is subject to
change without notice.
DESCRIPTION
The W3EG7234S is a 32Mx72 Double Data Rate
SDRAM memory module based on 128Mb DDR
SDRAM component. The module consists of eighteen
32Mx4 DDR SDRAMs in 66 pin TSOP package
mounted on a 184 Pin FR4 substrate.
Synchronous design allows precise cycle control with
the use of system clock. Data I/O transactions are
possible on both edges and Burst Lenths allow the
same device to be useful for a variety of high bandwidth,
high performance memory system applications.
OPERATING FREQUENCIES
DDR266 @CL=2
Clock Speed
CL-t
RCD
-t
RP
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
December 2004
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
PIN CONFIGURATIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
SYMBOL
V
REF
DQ0
V
SS
DQ1
DQS0
DQ2
V
CC
DQ3
NC
RESET#
V
SS
DQ8
DQ9
DQS1
V
CCQ
*CK1
*CK1#
V
SS
DQ10
DQ11
CKE0
V
CCQ
DQ16
DQ17
DQS2
V
SS
A9
DQ18
A7
V
CCQ
DQ19
A5
DQ24
V
SS
DQ25
DQS3
A4
V
CC
DQ26
DQ27
A2
V
SS
A1
CB0
CB1
V
CC
PIN
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
SYMBOL
DQS8
A0
CB2
V
SS
CB3
BA1
DQ32
V
CCQ
DQ33
DQS4
DQ34
V
SS
BA0
DQ35
DQ40
V
CCQ
WE#
DQ41
CAS#
V
SS
DQS5
DQ42
DQ43
V
CC
*CK2#
DQ48
DQ49
V
SS
*CK2#
*CK2
V
CCQ
DQS6
DQ50
DQ51
V
SS
V
CCID
DQ56
DQ57
V
CC
DQS7
DQ58
DQ59
V
SS
NC
SDA
SCL
PIN
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
SYMBOL
V
SS
DQ4
DQ5
V
CCQ
DQS9
DQ6
DQ7
V
SS
NC
NC
NC
V
CCQ
DQ12
DQ13
DQS10
V
CC
DQ14
DQ15
*CKE1
V
CCQ
*BA2
DQ20
A12
V
SS
DQ21
A11
DQS11
V
CC
DQ22
A8
DQ23
V
SS
A6
DQ28
DQ29
V
CCQ
DQS12
A3
DQ30
V
SS
DQ31
CB4
CB5
V
CCQ
CK0
CK0#
PIN
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
SYMBOL
V
SS
DQS17
A10
CB6
V
CCQ
CB7
V
SS
DQ36
DQ37
V
CC
DQS13
DQ38
DQ39
V
SS
DQ44
RAS#
DQ45
V
CCQ
CS0#
*CS1#
DQS14
V
SS
DQ46
DQ47
*CS3#
V
CCQ
DQ52
DQ53
A13*
V
CC
DQS15
DQ54
DQ55
V
CCQ
NC
DQ60
DQ61
V
SS
DQS16
DQ62
DQ63
V
CCQ
SA0
SA1
SA2
V
CCSPD
W3EG7234S-D3
-JD3
-AJD3
PRELIMINARY
PIN NAMES
A0 – A12
BA0-BA1
DQ0-DQ63
CB0-CB7
DQS0-DQS17
CK0
CK0#
CKE0
CS0#
RAS#
CAS#
WE#
V
CC
V
CCQ
V
SS
V
REF
V
CCSPD
SDA
SCL
SA0-SA2
V
CCID
NC
RESET#
* Not Used
Address input (Multiplexed)
Bank Select Address
Data Input/Output
Check bits
Data Strobe Input/Output
Clock Input
Clock Input
Clock Enable Input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
Power Supply
Power Supply for DQS
Ground
Power Supply for Reference
Serial EEPROM Power Supply
Serial data I/O
Serial clock
Address in EEPROM
V
CC
Identification Flag
No Connect
Reset Enable
December 2004
Rev. 2
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FUNCTIONAL BLOCK DIAGRAM
V
SS
RCS0#
DQS0
DQ0
DQ1
DQ2
DQ3
DQS
I/O 3
I/O 2
I/O 1
I/O 0
CS#
DM
DQ4
DQ5
DQ6
DQ7
I/O
I/O
I/O
I/O
W3EG7234S-D3
-JD3
-AJD3
PRELIMINARY
DQS9
DQS
3
2
1
0
CS#
DM
DQS1
DQ8
DQ9
DQ10
DQ11
DQS
I/O 3
I/O 2
I/O 1
I/O 0
CS#
DM
DQS10
DQ12
DQ13
DQ14
DQ15
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
DQS2
DQ16
DQ17
DQ18
DQ19
DQS
I/O 3
I/O 2
I/O 1
I/O 0
CS#
DM
DQS11
DQ20
DQ21
DQ22
DQ23
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
DQS3
DQ24
DQ25
DQ26
DQ27
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
DQS12
DQ28
DQ29
DQ30
DQ31
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
DQS4
DQS
DQ32
DQ33
DQ34
DQ35
I/O
I/O
I/O
I/O
3
2
1
0
CS#
DM
DQS13
DQ36
DQ37
DQ38
DQ39
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
CK0
SDRAM
PLL
CK0#
REGISTER
CS#
DM
DQS5
DQ40
DQ41
DQ42
DQ43
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
DQS14
DQ44
DQ45
DQ46
DQ47
I/O
I/O
I/O
I/O
DQS
3
2
1
0
DQS6
DQS
DQ48
DQ49
DQ50
DQ51
I/O
I/O
I/O
I/O
3
2
1
0
CS#
DM
DQS15
DQ52
DQ53
DQ54
DQ55
I/O
I/O
I/O
I/O
DQS
3
2
1
0
CS#
DM
Serial PD
SCL
WP
A0
SA0
DQ60
DQ61
DQ62
DQ63
DQS
I/O 3
I/O 2
I/O 1
I/O 0
CS#
DM
SDA
A1
SA1
A2
SA2
DQS7
DQ56
DQ57
DQ58
DQ59
DQS
I/O 3
I/O 2
I/O 1
I/O 0
CS#
DM
DQS16
V
CCSPD
SPD
DDR SDRAM
DQS8
DQS
CB0
CB1
CB2
CB3
I/O
I/O
I/O
I/O
3
2
1
0
CS#
DM
DQS17
CB4
CB5
CB6
CB7
DQS
I/O 3
I/O 2
I/O 1
I/O 0
CS#
DM
V
CC
/V
CCQ
V
REF
V
SS
DDR SDRAM
DDR SDRAM
CS0#
BA0-BA1
A0-A12
RAS#
CAS#
CKE0
WE#
PCK
PCK#
R
E
G
I
S
T
E
R
RCS0#
RBA0 - RBA1
RA0 - RA12
RRAS#
RCAS#
RCKE0
RWE#
RESET#
BA0-BA1: DDR SDRAMs
A0-A12: DDR SDRAMs
RAS#: DDR SDRAMs
CAS#: DDR SDRAMs
CKE: DDR SDRAMs
WE#: DDR SDRAMs
NOTE: All resistor values are 22 ohms unless otherwise specified
December 2004
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Current
Note:
W3EG7234S-D3
-JD3
-AJD3
PRELIMINARY
Symbol
V
IN
, V
OUT
V
CC
, V
CCQ
T
STG
P
D
I
OS
Value
-0.5 to 3.6
-1.0 to 3.6
-55 to +150
27
50
Units
V
V
°C
W
mA
Permanent device damage may occur if ‘ABSOLUTE MAXIMUM RATINGS’ are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability
DC CHARACTERISTICS
0°C
≤
T
A
≤
70°C, V
CC
= 2.5V ± 0.2V
Symbol
V
CC
V
CCQ
V
REF
V
TT
V
IH
V
IL
V
OH
V
OL
Parameter
Supply Voltage
Supply Voltage
Reference Voltage
Termination Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Min
2.3
2.3
1.15
1.15
V
REF
+ 0.15
-0.3
V
TT
+ 0.76
—
Max
2.7
2.7
1.35
1.35
V
CCQ
+ 0.3
V
REF
-0.15
—
V
TT
-0.76
Unit
V
V
V
V
V
V
V
V
CAPACITANCE
T
A
= 25°C. f = 1MHz, V
CC
= 2.5V
Parameter
Input Capacitance (A0-A12)
Input Capacitance (RAS#,CAS#,WE#)
Input Capacitance (CKE0)
Input Capacitance (CK0#,CK0)
Input Capacitance (CS0#)
Input Capacitance (DQS0-DQS17)
Input Capacitance (BA0-BA1)
Data input/output capacitance (DQ0-DQ63)(DQS)
Data input/output capacitance (CB0-CB7)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
IN7
C
OUT
C
OUT
Max
6.25
6.25
6.25
5.5
6.25
13
6.25
13
13
Unit
pF
pF
pF
pF
pF
pF
pF
pF
pF
December 2004
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
I
DD
SPECIFICATIONS AND TEST CONDITIONS
0°C
≤
T
A
≤
70°C, V
CCQ
= 2.5V ± 0.2V, V
CC
= 2.5V ± 0.2V
Includes PLL and Register Power
DDR266@CL=2
Max
2520
W3EG7234S-D3
-JD3
-AJD3
PRELIMINARY
Parameter
Operating Current
Symbol
I
DD0
Rank 1
Conditions
One device bank; Active - Precharge; t
RC
= t
RC
(MIN); t
CK
= t
CK
(MIN); DQ,DM and
DQS inputs changing once per clock cycle;
Address and control inputs changing once
every two cycles.
One device bank; Active-Read-Precharge
Burst = 2; t
RC
= t
RC
(MIN); t
CK
= t
CK
(MIN);
l
OUT
= 0mA; Address and control inputs
changing once per clock cycle.
All device banks idle; Power-down mode;
t
CK
= t
CK
(MIN); CKE = (low)
CS# = High; All device banks idle;
t
CK
= t
CK
(MIN); CKE = High; Address
and other control inputs changing once
per clock cycle. V
IN
= V
REF
for DQ, DQS
and DM.
One device bank active; Power-Down
mode; t
CK
(MIN); CKE = (low)
CS# = High; CKE = High; One device
bank; Active-Precharge;t
RC
= t
RAS
(MAX);
t
CK
= t
CK
(MIN); DQ, DM and DQS inputs
changing twice per clock cycle; Address
and other control inputs changing once per
clock cycle.
Burst = 2; Reads; Continuous burst; One
device bank active; Address and control
inputs changing once per clock cycle; t
CK
=
t
CK
(MIN); l
OUT
= 0mA.
Burst = 2; Writes; Continuous burst; One
device bank active; Address and control
inputs changing once per clock cycle;
t
CK
= t
CK
(MIN); DQ,DM and DQS inputs
changing once per clock cycle.
t
RC
= t
RC
(MIN)
CKE
≤
0.2V
Four bank interleaving Reads (BL=4)
with auto precharge with t
RC
=t
RC
(MIN);
t
CK
=t
CK
(MIN); Address and control inputs
change only during Active Read or Write
commands.
DDR266@CL=2.5
Max
2385
DDR200@CL=2
Max
2385
Units
mA
Operating Current
I
DD1
2700
2520
2520
mA
Precharge Power-
Down Standby Current
Idle Standby Current
I
DD2P
I
DD2F
54
54
54
mA
1120
1030
1030
mA
Active Power-Down
Standby Current
Active Standby Current
I
DD3P
I
DD3N
450
360
360
mA
1210
1120
1120
mA
Operating Current
I
DD4R
2745
2610
2610
mA
Operating Current
I
DD4W
2700
2565
2565
mA
Auto Refresh Current
Self Refresh Current
Operating Current
I
DD5
I
DD6
I
DD7A
3770
329
3680
311
3645
346
mA
mA
4860
4770
4770
mA
December 2004
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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W3EG7234S202JD3 Related Products

W3EG7234S202JD3 W3EG7234S-D3 W3EG7234S262JD3 W3EG7234S-JD3 W3EG7234S265AJD3 W3EG7234S-AJD3 W3EG7234S202AJD3
Description 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL
Is it Rohs certified? incompatible - incompatible - incompatible - incompatible
Maker White Electronic Designs Corporation - White Electronic Designs Corporation - White Electronic Designs Corporation - White Electronic Designs Corporation
package instruction DIMM, - DIMM, - DIMM, - DIMM,
Reach Compliance Code unknow - unknow - unknow - unknow
access mode FOUR BANK PAGE BURST - FOUR BANK PAGE BURST - FOUR BANK PAGE BURST - FOUR BANK PAGE BURST
Other features AUTO/SELF REFRESH - AUTO/SELF REFRESH - AUTO/SELF REFRESH - AUTO/SELF REFRESH
JESD-30 code R-XDMA-N184 - R-XDMA-N184 - R-XDMA-N184 - R-XDMA-N184
memory density 2415919104 bi - 2415919104 bi - 2415919104 bi - 2415919104 bi
Memory IC Type DDR DRAM MODULE - DDR DRAM MODULE - DDR DRAM MODULE - DDR DRAM MODULE
memory width 72 - 72 - 72 - 72
Number of functions 1 - 1 - 1 - 1
Number of ports 1 - 1 - 1 - 1
Number of terminals 184 - 184 - 184 - 184
word count 33554432 words - 33554432 words - 33554432 words - 33554432 words
character code 32000000 - 32000000 - 32000000 - 32000000
Operating mode SYNCHRONOUS - SYNCHRONOUS - SYNCHRONOUS - SYNCHRONOUS
Maximum operating temperature 70 °C - 70 °C - 70 °C - 70 °C
organize 32MX72 - 32MX72 - 32MX72 - 32MX72
Package body material UNSPECIFIED - UNSPECIFIED - UNSPECIFIED - UNSPECIFIED
encapsulated code DIMM - DIMM - DIMM - DIMM
Package shape RECTANGULAR - RECTANGULAR - RECTANGULAR - RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY - MICROELECTRONIC ASSEMBLY - MICROELECTRONIC ASSEMBLY - MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED
Certification status Not Qualified - Not Qualified - Not Qualified - Not Qualified
self refresh YES - YES - YES - YES
Maximum supply voltage (Vsup) 2.7 V - 2.7 V - 2.7 V - 2.7 V
Minimum supply voltage (Vsup) 2.3 V - 2.3 V - 2.3 V - 2.3 V
Nominal supply voltage (Vsup) 2.5 V - 2.5 V - 2.5 V - 2.5 V
surface mount NO - NO - NO - NO
technology CMOS - CMOS - CMOS - CMOS
Temperature level COMMERCIAL - COMMERCIAL - COMMERCIAL - COMMERCIAL
Terminal form NO LEAD - NO LEAD - NO LEAD - NO LEAD
Terminal location DUAL - DUAL - DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED

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