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NLVVHC1GT04DTT1G

Description
IC INVERTER 1CH 1-INP 5TSOP
Categorylogic    logic   
File Size74KB,6 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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NLVVHC1GT04DTT1G Overview

IC INVERTER 1CH 1-INP 5TSOP

NLVVHC1GT04DTT1G Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
package instructionTSSOP, TSOP5/6,.11,37
Manufacturer packaging code483
Reach Compliance Codecompliant
Factory Lead Time4 weeks
seriesAHC/VHC/H/U/V
JESD-30 codeR-PDSO-G5
JESD-609 codee3
length3 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeINVERTER
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of functions1
Number of entries1
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSOP5/6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTR
Maximum supply current (ICC)0.04 mA
Prop。Delay @ Nom-Sup10 ns
propagation delay (tpd)17.5 ns
Schmitt triggerNO
Filter levelAEC-Q100
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
width1.5 mm
NLVVHC1GT04
Inverting Buffer /
CMOS Logic Level Shifter
LSTTL−Compatible Inputs
The NLVVHC1GT04 is a single gate inverting buffer fabricated
with silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic−level translator from 3 V
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V
CMOS Logic while operating at the high−voltage power supply.
The NLVVHC1GT04 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the NLVVHC1GT04 to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when V
CC
=
0 V. These input and output structures help prevent device destruction
caused by supply voltage − input/output voltage mismatch, battery
backup, hot insertion, etc.
Features
www.onsemi.com
MARKING
DIAGRAMS
5
5
1
SC−88A
DF SUFFIX
CASE 419A
1
VK M
G
G
M
5
5
1
TSOP−5
DT SUFFIX
CASE 483
1
VK M
G
G
High Speed: t
PD
= 3.8 ns (Typ) at V
CC
= 5 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2 V
CMOS−Compatible Outputs: V
OH
> 0.8 V
CC
; V
OL
< 0.1 V
CC
@ Load
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
VK = Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
PIN ASSIGNMENT
1
2
3
4
5
NC
IN A
GND
OUT Y
V
CC
Chip Complexity: FETs = 105; Equivalent Gates = 26
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
NC
IN A
GND
1
2
3
4
OUT Y
5
V
CC
FUNCTION TABLE
A Input
L
H
Y Output
H
L
Figure 1. Pinout
(Top View)
IN A
1
OUT Y
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
©
Semiconductor Components Industries, LLC, 2015
1
November, 2015 − Rev. 0
Publication Order Number:
NLVVHC1GT04/D

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