taneously sampled differential inputs. The device draws
only 5.5mA from a single 3V supply, and comes in a tiny
32-pin (5mm
×
5mm) QFN package. A Sleep shutdown
mode further reduces power consumption to 12μW. The
combination of low power and tiny package makes the
LTC2351-12 suitable for portable applications.
The LTC2351-12 contains six separate differential inputs
that are sampled simultaneously on the rising edge of the
CONV signal. These six sampled inputs are then converted
at a rate of 250ksps per channel.
The 83dB common mode rejection allows users to eliminate
ground loops and common mode noise by measuring
signals differentially from the source.
The device converts 0V to 2.5V unipolar inputs differentially,
or ±1.25V bipolar inputs also differentially, depending on the
state of the BIP pin. Any analog input may swing rail-to-rail
as long as the differential input range is maintained.
The conversion sequence can be abbreviated to convert
fewer than six channels, depending on the logic state of
the SEL2, SEL1 and SEL0 inputs.
The serial interface sends out the six conversion results in 96
clocks for compatibility with standard serial interfaces.
1.5Msps ADC with 6 Simultaneously Sampled
Differential Inputs
250ksps Throughput per Channel
72dB SINAD
Low Power Dissipation: 16.5mW
3V Single Supply Operation
2.5V Internal Bandgap Reference, Can be Overdriven
With External Reference
3-Wire SPI-Compatible Serial Interface
Internal Conversion Triggered by CONV
SLEEP (12μW) Shutdown Mode
NAP (4.5mW) Shutdown Mode
0V to 2.5V Unipolar, or ±1.25V Bipolar Differential
Input Range
83dB Common Mode Rejection
Tiny 32-Pin (5mm
×
5mm) QFN Package
APPLICATIONS
n
n
n
n
Multiphase Power Measurement
Multiphase Motor Control
Data Acquisition Systems
Uninterruptable Power Supplies
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6084440, 6522187.
BLOCK DIAGRAM
CH5
–
21
CH5
+
20
19
CH4
–
18
CH4
+
17
16
CH3
–
15
CH3
+
14
12
13
CH2
–
11
CH2
+
10
9
CH1
–
8
CH1
+
7
6
5
CH0
–
4
CH0
+
10μF
V
CC
24
3V
V
DD
25
12-BIT LATCH 0
12-BIT LATCH 1
12-BIT LATCH 2
12-BIT LATCH 3
12-BIT LATCH 4
12-BIT LATCH 5
OV
DD
3V
SD0
OGND
0.1μF
–
–
S AND H
–
–
–
–
S AND H
+
+
S AND H
+
MUX
S AND H
+
S AND H
+
S AND H
2.5V
REFERENCE
+
1.5Msps
12-BIT ADC
22
GND
10μF
23
V
REF
29
BIP
THREE-
STATE
SERIAL
OUTPUT
PORT
3
1
2
TIMING
LOGIC
30
32
31
CONV
SCK
DGND
33
26
27
28
235112 TA01
SEL2 SEL1 SEL0
235112fa
1
LTC2351-12
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PIN CONFIGURATION
TOP VIEW
CH3
–
CH3
+
CH2
–
CH2
+
GND
GND
GND
GND
8
7
6
33
5
4
3
2
1
25 26 27 28 29 30 31 32
V
DD
BIP
SEL2
SEL1
SEL0
CONV
DGND
SCK
CH1
–
CH1
+
GND
CH0
–
CH0
+
OV
DD
OGND
SDO
Supply Voltage (V
DD
, V
CC
, OV
DD
) ................................4V
Analog and V
REF
Input Voltages
(Note 3) ................................... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltages ................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage .................. –0.3V to (V
DD
+ 0.3V)
Power Dissipation ...............................................100mW
Operation Temperature Range
LTC2351C-12 ........................................... 0°C to 70°C
LTC2351I-12 ........................................–40°C to 85°C
LTC2351H-12 .....................................–40°C to 125°C
Storage Temperature Range...................–65°C to 150°C
16 15 14 13 12 11 10 9
CH4
+
17
CH4
–
18
GND 19
CH5
+
20
CH5
–
21
GND 22
V
REF
23
V
CC
24
QFN PACKAGE
32-PIN (5mm 5mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 34°C/W
EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC2351CUH-12#PBF
LTC2351IUH-12#PBF
LTC2351HUH-12#PBF
TAPE AND REEL
LTC2351CUH-12#TRPBF
LTC2351IUH-12#TRPBF
LTC2351HUH-12#TRPBF
PART MARKING*
235112
235112
235112
PACKAGE DESCRIPTION
32-Pin (5mm
×
5mm) Plastic QFN
32-Pin (5mm
×
5mm) Plastic QFN
32-Pin (5mm
×
5mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
CONVERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Offset Error
Offset Match from CH0 to CH5
Range Error
Range Match from CH0 to CH5
Range Tempco
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= V
CC
= 3V.
CONDITIONS
l
MIN
12
–1
–4.5
–5
–3
–12
–5
l
l
l
l
TYP
±0.25
±1
±1
±0.5
±2
±1
±15
±1
MAX
1
4.5
5
3
12
5
UNITS
Bits
LSB
mV
mV
mV
mV
mV
ppm/°C
ppm/°C
(Note 5)
(Note 4)
LTC2351H-12
(Note 4)
Internal Reference (Note 4)
External Reference
235112fa
2
LTC2351-12
ANALOG INPUT
SYMBOL
V
IN
V
CM
I
IN
C
IN
t
ACQ
t
AP
t
JITTER
t
SK
CMRR
PARAMETER
Analog Differential Input Range (Notes 3, 8, 9)
Analog Common Mode + Differential Input Range
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Aperture Delay Time
Sample-and-Hold Aperture Delay Time Jitter
Channel to Channel Aperture Skew
Analog Input Common Mode Rejection Ratio
f
IN
= 100kHz, V
IN
= 0V to 3V
f
IN
= 10MHz, V
IN
= 0V to 3V
(Note 6)
l
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= V
CC
= 3V.
CONDITIONS
2.7V ≤ V
DD
≤ 3.6V, Unipolar
2.7V ≤ V
DD
≤ 3.6V, Bipolar
(Note 8)
l
MIN
TYP
0 to 2.5
±1.25
0 to V
DD
MAX
UNITS
V
V
V
1
13
39
1
0.3
200
–83
–67
μA
pF
ns
ns
ps
ps
dB
dB
DYNAMIC ACCURACY
SYMBOL PARAMETER
SINAD
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= V
CC
= 3V.
CONDITIONS
l
l
l
l
MIN
69
68
–80
–79
TYP
72
71
72
–90
–85
–89
90
85
–80
0.2
50
5
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
LSB
RMS
MHz
MHz
Signal-to-Noise Plus Distortion Ratio 100kHz Input Signal
300kHz Input Signal
100kHz Input Signal (LTC2351H-12)
Total Harmonic Distortion
100kHz First 5 Harmonics
300kHz First 5 Harmonics
100kHz First 5 Harmonics (LTC2351H-12)
100kHz Input Signal
300kHz Input Signal
0.625V
P-P
, 833kHz into CH0
+
, 0.625V
P-P
, 841kHz into CH0
–
Bipolar Mode. Also Applicable to Other Channels
V
REF
= 2.5V (Note 17)
V
IN
= 2.5V
P-P
, SDO = 11585LSB
P-P
(–3dBFS) (Note 15)
S/(N + D) ≥ 68dB, Bipolar Differential Input
THD
SFDR
IMD
Spurious Free Dynamic Range
Intermodulation Distortion
Code-to-Code Transition Noise
Full Power Bandwidth
Full Linear Bandwidth
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Output Resistance
V
REF
Settling Time
External V
REF
Input Range
V
DD
= 2.7V to 3.6V, V
REF
= 2.5V
Load Current = 0.5mA
Ext C
REF
= 10μF
CONDITIONS
I
OUT
= 0
T
A
= 25°C. V
DD
= V
CC
= 3V.
MIN
TYP
2.5
15
600
0.2
2
2.55
V
DD
MAX
UNITS
V
ppm/°C
μV/V
Ω
ms
V
235112fa
3
LTC2351-12
DIGITAL INPUTS AND DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage D
OUT
Hi-Z Output Capacitance D
OUT
Output Short-Circuit Source Current
Output Short-Circuit Sink Current
V
OUT
= 0V, V
DD
= 3V
V
OUT
= V
DD
= 3V
V
DD
= 3V, I
OUT
= –200μA
V
DD
= 2.7V, I
OUT
= 160μA
V
DD
= 2.7V, I
OUT
= 1.6mA
V
OUT
= 0V and V
DD
l
l
l
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= V
CC
= 3V.
CONDITIONS
V
DD
= 3.3V
V
DD
= 2.7V
V
IN
= 0V to V
DD
l
l
l
MIN
2.4
TYP
MAX
0.6
±10
UNITS
V
V
μA
pF
V
V
V
μA
pF
mA
mA
5
2.5
2.9
0.05
0.4
±10
1
20
15
POWER REQUIREMENTS
SYMBOL
V
DD
, V
CC
I
DD
+ I
CC
PARAMETER
Supply Voltage
Supply Current
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= V
CC
= 3V.
CONDITIONS
Active Mode, f
SAMPLE
= 1.5Msps
Active Mode, f
SAMPLE
= 1.5Msps (LTC2351H-12)
Nap Mode
Nap Mode (LTC2351H-12)
Sleep Mode
Active Mode with SCK, f
SAMPLE
= 1.5Msps
l
l
l
l
MIN
2.7
TYP
3.0
5.5
6
1.5
1.8
4.0
16.5
MAX
3.6
8
9
2
2.5
15
UNITS
V
mA
mA
mA
mA
μA
mW
P
D
Power Dissipation
TIMING CHARACTERISTICS
SYMBOL
PARAMETER
f
SAMPLE(MAX)
Maximum Sampling Rate per Channel
(Conversion Rate)
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V.
CONDITIONS
l
l
MIN
250
TYP
MAX
UNITS
kHz
t
THROUGHPUT
Minimum Sampling Period (Conversion + Acquisiton Period)
t
SCK
t
CONV
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
Clock Period
Conversion Time
Minimum High or Low SCLK Pulse Width
CONV to SCK Setup Time
SCK Before CONV
Minimum High or Low CONV Pulse Width
SCK↑ to Sample Mode
CONV↑ to Hold Mode
96th SCK↑ to CONV↑ Interval (Affects Acquisition Period)
Minimum Delay from SCK to Valid Bits 0 Through 11
(Note 16)
(Notes 6, 17)
(Note 6)
(Notes 6, 10)
(Note 6)
(Note 6)
(Note 6)
(Notes 6, 11)
(Notes 6, 7, 13)
(Notes 6, 12)
4
40
96
2
3
0
4
4
1.2
45
8
10000
10000
μs
ns
SCLK cycles
ns
ns
ns
ns
ns
ns
ns
ns
l
235112fa
4
LTC2351-12
TIMING CHARACTERISTICS
SYMBOL
t
9
t
10
t
11
PARAMETER
SCK↑ to Hi-Z at SDO
Previous SDO Bit Remains Valid After SCK
V
REF
Settling Time After Sleep-to-Wake Transition
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V.
CONDITIONS
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 14)
2
2
MIN
TYP
MAX
6
UNITS
ns
ns
ms
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2:
All voltage values are with respect to ground GND.
Note 3:
When these pins are taken below GND or above V
DD
, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below GND or greater than V
DD
without latchup.
Note 4:
Offset and range specifications apply for a single-ended CH0
+
– CH5
+
input with CH0
–
– CH5
–
grounded and using the internal 2.5V
reference.
Note 5:
Integral linearity is tested with an external 2.55V reference and is
defined as the deviation of a code from the straight line passing through
the actual endpoints of a transfer curve. The deviation is measured from
the center of quantization band. Linearity is tested for CH0 only.
Note 6:
Guaranteed by design, not subject to test.
Note 7:
Recommended operating conditions.
Note 8:
The analog input range is defined for the voltage difference
between CHx
+
and CHx
–
, x = 0 to 5.
Note 9:
The absolute voltage at CHx
+
and CHx
–
must be within this range.
Note 10:
If less than 3ns is allowed, the output data will appear one
clock cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
Note 11:
Not the same as aperture delay. Aperture delay (1ns) is the
difference between the 2.2ns delay through the sample-and-hold and the
1.2ns CONV to Hold mode delay.
Note 12:
The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 13:
The time period for acquiring the input signal is started by the
96th rising clock and it is ended by the rising edge of CONV.
Note 14:
The internal reference settles in 2ms after it wakes up from Sleep
mode with one or more cycles at SCK and a 10μF capacitive load.
Note 15:
The full power bandwidth is the frequency where the output code
swing drops by 3dB with a 2.5V
P-P
input sine wave.
Note 16:
Maximum clock period guarantees analog performance during
conversion. Output data can be read with an arbitrarily long clock period.
Note 17:
The conversion process takes 16 clocks for each channel that is
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