LTC1430
High Power Step-Down
Switching Regulator Controller
FEATURES
s
s
s
s
DESCRIPTIO
s
s
s
s
s
s
s
s
High Power 5V to 3.xV Switching Controller:
Can Exceed 10A Output
All N-Channel External MOSFETs
Constant Frequency Operation—Small Inductor
Excellent Output Regulation:
±1%
Over Line, Load
and Temperature Variations
High Efficiency: Over 95% Possible
Fixed Frequency Operation
No Low Value Sense Resistor Needed
Outputs Can Drive External FETs with Up to
10,000pF Gate Capacitance
Quiescent Current: 350µA Typ, 1µA in Shutdown
Fast Transient Response
Adjustable or Fixed 3.3V Output
Available in 8- and 16-Lead PDIP and SO Packages
The LTC
®
1430 is a high power, high efficiency switching
regulator controller optimized for 5V to 3.xV applications.
It includes a precision internal reference and an internal
feedback system that can provide output regulation of
±1%
over temperature, load current and line voltage shifts. The
LTC1430 uses a synchronous switching architecture with
two N-channel output devices, eliminating the need for a
high power, high cost P-channel device. Additionally, it
senses output current across the drain-source resistance
of the upper N-channel FET, providing an adjustable
current limit without an external low value sense resistor.
The LTC1430 includes a fixed frequency PWM oscillator for
low output ripple under virtually all operating conditions.
The 200kHz free-running clock frequency can be externally
adjusted from 100kHz to above 500kHz. The LTC1430
features low 350µA quiescent current, allowing greater
than 90% efficiency operation in converter designs from
1A to greater than 50A output current. Shutdown mode
drops the LTC1430 supply current to 1µA.
For new
designs, refer to the LTC3830.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Pentium is a registered trademark of Intel Corporation.
APPLICATIO S
s
s
s
s
Power Supply for P6 and Pentium
®
Microprocessors
High Power 5V to 3.xV Regulators
Local Regulation for Dual Voltage Logic Boards
Low Voltage, High Current Battery Regulation
TYPICAL APPLICATIO
V
IN
5V
Typical 5V to 3.3V, 10A Application
100
+
100Ω
1µF
PV
CC2
1N4148
PV
CC1
G1
I
MAX
LTC1430 I
FB
FREQSET
SHDN
COMP
G2
PGND
GND
SENSE
SENSE
–
+
+
16k
0.1µF
0.1µF
1k
C
IN
220µF
×4
EFFICIENCY (%)
+
4.7µF
0.1µF
0.01µF
NC
SHUTDOWN
C1
220pF
V
CC
SS
M1A, M1B
2 IN PARALLEL
L1, 2.8µH
+
M2
C
OUT
330µF
×6
3.3V
10A
R
C
7.5k
C
C
4700pF
LTC1430 • TA01
FB
NC
C
IN
: AVX-TPSE227M010R0100
C
OUT
: AVX-TPSE337M006R0100
L1: ETQP6F1R6SFA
M1A, M1B, M2: MOTOROLA MTD20N03HL
U
Efficiency
T
A
= 25°C
V
IN
= 5V
V
OUT
= 3.3V
90
80
70
60
50
40
0.1
1
LOAD CURRENT (A)
10
LTC1430 • TA02
U
U
1
LTC1430
ABSOLUTE
AXI U RATI GS
Supply Voltage
V
CC
....................................................................... 9V
PV
CC1, 2
.............................................................. 13V
Input Voltage
I
FB
......................................................... – 0.3V to 18V
All Other Inputs ...................... – 0.3V to (V
CC
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
TOP VIEW
G1 1
PV
CC1
2
GND 3
FB 4
N8 PACKAGE
8-LEAD PDIP
8
7
6
5
G2
V
CC
/PV
CC2
COMP
SHDN
ORDER
PART NUMBER
LTC1430CN8
LTC1430CS8
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART MARKING
1430
T
JMAX
= 150°C,
θ
JA
= 100°C/W (N8)
T
JMAX
= 150°C,
θ
JA
= 150°C/W (S8)
Consult factory for Industrial and Military grade parts.
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 5V unless otherwise noted. (Note 2)
SYMBOL
V
CC
PV
CC
V
OUT
V
FB
∆V
OUT
PARAMETER
Supply Voltage
PV
CC1
, PV
CC2
Output Voltage
Feedback Voltage
Output Load Regulation
Output Line Regulation
IV
CC
IPV
CC
f
OSC
Supply Current (V
CC
Only)
Supply Current (PV
CC
)
Internal Oscillator Frequency
Figure 1
Figure 1, SENSE
+
and SENSE
–
Floating (LTC1430C)
Figure 1, SENSE
+
and SENSE
–
Floating (LTC1430I)
Figure 1, I
OUT
= 0A to 10A (Note 3) (LTC1430C)
Figure 1, I
OUT
= 0A to 10A (Note 3) (LTC1430I)
CONDITIONS
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
Figure 1, V
CC
= 4.75V to 5.25V (Note 3) (LTC1430C)
q
Figure 1, V
CC
= 4.75V to 5.25V (Note 3) (LTC1430I)
Figure 2, V
SHDN
= V
CC
V
SHDN
= 0V
Figure 2, PV
CC
= 5V, V
SHDN
= V
CC
(Note 4)
V
SHDN
= 0V
FREQSET Floating (LTC1430C)
FREQSET Floating (LTC1430I)
q
q
q
2
U
U
W
W W
U
W
(Note 1)
Operating Temperature Range
LTC1430C .............................................. 0°C to 70°C
LTC1430I ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TOP VIEW
G1
PV
CC1
PGND
GND
SENSE
–
FB
SENSE
+
SHDN
1
2
3
4
5
6
7
8
16 G2
15 PV
CC2
14 V
CC
13 I
FB
12 I
MAX
11 FREQSET
10 COMP
9
SS
ORDER
PART NUMBER
LTC1430CN
LTC1430CS
LTC1430IS
N PACKAGE
16-LEAD PDIP
S PACKAGE
16-LEAD PLASTIC SO
T
JMAX
= 150°C,
θ
JA
= 70°C/W (N)
T
JMAX
= 150°C,
θ
JA
= 110°C/W (S)
MIN
4
TYP
MAX
8
13
UNITS
V
V
V
V
V
mV
mV
mV
mV
µA
µA
mA
µA
3.30
1.25
1.23
1.265
1.265
5
5
1
1
350
1
1.5
0.1
140
130
200
200
260
300
1.28
1.29
20
5
700
10
kHz
kHz
LTC1430
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 5V unless otherwise noted. (Note 2)
SYMBOL
V
IH
V
IL
I
IN
A
V
gm
V
gm
I
I
MAX
I
SS
t
r
, t
s
t
NOV
DC
MAX
PARAMETER
SHDN Input High Voltage
SHDN Input Low Voltage
SHDN Input Current
Error Amplifier Open-Loop DC Gain
Error Amplifier Transconductance
I
LIM
Amplifier Transconductance
I
MAX
Sink Current
Soft-Start Source Current
Driver Rise/Fall Time
Driver Non-Overlap Time
Maximum Duty Cycle
(LTC1430I)
(LTC1430C)
(LTC1430I)
(Note 5)
V
I(MAX)
= V
CC
(LTC1430C)
V
I(MAX)
= V
CC
(LTC1430I)
V
SS
= 0 (LTC1430C)
V
SS
= 0 (LTC1430I)
Figure 3, PV
CC1
= PV
CC2
= 5V
Figure 3, PV
CC1
= PV
CC2
= 5V
V
COMP
= V
CC
(LTC1430C)
V
COMP
= V
CC
, V
FB
= 0 (LTC1430I)
V
COMP
= V
CC
, V
FB
= 1.265V (LTC1430I)
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 3:
This parameter is guaranteed by correlation and is not tested
directly.
q
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
q
q
q
q
q
MIN
2.4
TYP
MAX
0.8
UNITS
V
V
µA
dB
µMho
µMho
µMho
µA
µA
µA
µA
ns
ns
%
%
%
±0.1
40
300
8
8
–8
–8
25
48
650
650
1300
12
12
–12
–12
80
130
90
83
90
88
±1
1200
16
17
–16
–17
250
250
96
96
Note 4:
Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This will vary with
the LTC1430 operating frequency, operating voltage and the external FETs
used.
Note 5:
The I
LIM
amplifier can sink but cannot source current. Under
normal (not current limited) operation, the I
LIM
output current will be zero.
3
LTC1430
PI FU CTIO S
G1 (Pin 1/Pin 1):
Driver Output 1. Connect this pin to the
gate of the upper N-channel MOSFET, M1. This output will
swing from PV
CC1
to PGND. It will always be low when G2
is high.
PV
CC1
(Pin 2/Pin 2):
Power V
CC
for Driver 1. This is the
power supply input for G1. G1 will swing from PGND to
PV
CC1
. PV
CC1
must be connected to a potential of at least
PV
CC
+ V
GS(ON)
(M1). This potential can be generated
using an external supply or a simple charge pump con-
nected to the switching node between the upper MOSFET
and the lower MOSFET; see Applications Information for
details.
PGND (Pin 3/Pin 3):
Power Ground. Both drivers return to
this pin. It should be connected to a low impedance ground
in close proximity to the source of M2. 8-lead parts have
PGND and GND tied together at pin 3.
GND (Pin 4/Pin 3):
Signal Ground. All low power internal
circuitry returns to this pin. To minimize regulation errors
due to ground currents, GND should be connected to
PGND right at the LTC1430. 8-lead parts have PGND and
GND tied together internally at pin 3.
SENSE
–
, FB, SENSE
+
(Pins 5, 6, 7/Pin 4):
These three
pins connect to the internal resistor divider and to the
internal feedback node. To use the internal divider to set
the output voltage to 3.3V, connect SENSE
+
to the positive
terminal of the output capacitor and SENSE
–
to the nega-
tive terminal. FB should be left floating in applications that
use the internal divider. To use an external resistor divider
to set the output voltage, float SENSE
+
and SENSE
–
and
connect the external resistor divider to FB.
SHDN (Pin 8/Pin 5):
Shutdown. A TTL compatible low
level at SHDN for longer than 50µs puts the LTC1430 into
shutdown mode. In shutdown, G1 and G2 go low, all
internal circuits are disabled and the quiescent current
drops to 10µA max. A TTL compatible high level at SHDN
allows the part to operate normally.
SS (Pin 9/NA):
Soft-Start. The SS pin allows an external
capacitor to be connected to implement a soft-start func-
tion. An external capacitor from SS to ground controls the
start-up time and also compensates the current limit loop,
allowing the LTC1430 to enter and exit current limit
cleanly. See Applications Information for more details.
4
U
U
U
(16-Lead Package/8-Lead Package)
COMP (Pin 10/Pin 6):
External Compensation. The COMP
pin is connected directly to the output of the error amplifier
and the input of the PWM. An RC network is used at this
node to compensate the feedback loop to provide opti-
mum transient response. See Applications Information for
compensation details.
FREQSET (Pin 11/NA):
Frequency Set. This pin is used to
set the free running frequency of the internal oscillator.
With the pin floating, the oscillator runs at about 200kHz.
A resistor from FREQSET to ground will speed up the
oscillator; a resistor to V
CC
will slow it down. See Applica-
tions Information for resistor selection details.
I
MAX
(Pin 12/NA):
Current Limit Set. I
MAX
sets the thresh-
old for the internal current limit comparator. If I
FB
drops
below I
MAX
with G1 on, the LTC1430 will go into current
limit. I
MAX
has a 12µA pull-down to GND. It can be adjusted
with an external resistor to PV
CC
or an external voltage
source.
I
FB
(Pin 13/NA):
Current Limit Sense. Connect to the
switched node at the source of M1 and the drain of M2
through a 1k resistor. The 1k resistor is required to prevent
voltage transients from damaging I
FB
. This pin can be
taken up to 18V above GND without damage.
V
CC
(Pin 14/Pin 7):
Power Supply. All low power internal
circuits draw their supply from this pin. Connect to a clean
power supply, separate from the main PV
CC
supply at the
drain of M1. This pin requires a 4.7µF bypass capacitor.
8-lead parts have V
CC
and PV
CC2
tied together at pin 7 and
require a 10µF bypass to GND.
PV
CC2
(Pin 15/Pin 7):
Power V
CC
for Driver 2. This is the
power supply input for G2. G2 will swing from GND to
PV
CC2
. PV
CC2
is usually connected to the main high power
supply. The 8-lead parts have V
CC
and PV
CC2
tied together
at pin 7 and require a 10µF bypass to GND.
G2 (Pin 16/Pin 8):
Driver Output 2. Connect this pin to the
gate of the lower N-channel MOSFET, M2. This output will
swing from PV
CC2
to PGND. It will always be low when G1
is high.
LTC1430
BLOCK DIAGRA
SHDN
FREQSET
PV
CC1
PWM
COMP
V
CC
12µA
SS
I
LIM
FB
MIN
MAX
G1
PV
CC2
G2
PGND
I
MAX
12µA
40mV
+
1.26V
LTC1430 • BD
TEST CIRCUITS
PV
CC
= 5V
+
100Ω
1µF
PV
CC2
1N4148
PV
CC1
G1
I
MAX
LTC1430 I
FB
FREQSET
SHDN
COMP
G2
PGND
GND
SENSE
+
SENSE
–
FB
NC
0.1µF
+
4.7µF
0.1µF
0.01µF
NC
SHUTDOWN
C1
220pF
V
CC
SS
R
C
7.5k
C
C
4700pF
M1A, M1B, M2: MOTOROLA MTD20N03HL
C
IN
: AVX-TPSE227M010R0100
C
OUT
: AVX-TPSE337M006R0100
Figure 1
5V
V
SHDN
V
CC
PV
CC
10µF
0.1µF
SHDN V
CC
PV
CC2
PV
CC1
NC
NC
NC
NC
I
MAX
FREQSET
COMP
SS
GND
LTC1430
I
FB
G1
G2
FB
NC
NC
NC
PGND SENSE
–
SENSE
+
LTC1430 • TC02
Figure 2
+
W
DELAY
50µs
INTERNAL
SHUTDOWN
–
+
+
–
I
FB
+
40mV
FB
20.1k
12.4k
SENSE
+
SENSE
–
+
C
IN
220µF
×4
FB MEASUREMENT
LTC1430
SENSE
+
3.3V
C
OUT
330µF
×6
SENSE
–
FB
1k
NC
V
OUT
1.61k
M1A, M1B
2 IN PARALLEL
2.7µH/15A
M2
+
NC
LTC1430 • F01
V
CC
PV
CC1
PV
CC2
G1
10,000pF
LTC1430
G2
PGND
G2 RISE/FALL
10,000pF
LTC1430 • TC03
G1 RISE/FALL
GND
Figure 3
5
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
