DM74ALS240A, DM74ALS241A Octal 3-STATE Bus Driver
DM74ALS240A, DM74ALS241A
Octal 3-STATE Bus Driver
Features
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Advanced low power oxide-isolated ion-implanted
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September
2007
tm
General Description
These octal 3-STATE bus drivers are designed to
provide the designer with flexibility in implementing a bus
interface with memory, microprocessor, or communi-
cation systems. The output 3-STATE gating control is
organized into two separate groups of four buffers.
The DM74ALS240A control inputs symmetrically enable
the respective outputs when set logic LOW, while the
DM74ALS241A has complementary enable gating.
The 3-STATE circuitry contains a feature that maintains
the buffer outputs in 3-STATE (high impedance state)
during power supply ramp-up or ramp-down. This elimi-
nates bus glitching problems that arise during power-up
and power-down.
Schottky TTL process
Functional and pin compatible with the DM74LS
counterpart
Improved switching performance with less power
dissipation compared with the DM74LS counterpart
Switching response specified into 500
Ω
and 50pF
load
Switching response specifications guaranteed over
full temperature and V
CC
supply range
PNP input design reduces input loading
Low level drive current: 74ALS
=
24mA
Ordering Information
Order Number
DM74ALS240AWM
DM74ALS240ASJ
DM74ALS240AN
DM74ALS241AWM
Package
Number
M20B
M20D
N20A
M20B
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
DM74ALS240A
DM74ALS241A
©1986 Fairchild Semiconductor Corporation
DM74ALS240A, DM74ALS241A Rev. 1.3
www.fairchildsemi.com
DM74ALS240A, DM74ALS241A Octal 3-STATE Bus Driver
Function Tables
DM74ALS240A
DM74ALS241A
Input
G
L
L
H
Output
A
L
H
X
Input
1G
L
L
H
Output
Y
L
H
Z
L
H
X
H
H
L
Input
2G
2A
L
H
X
Output
Y
L
H
Z
Y
H
L
Z
1A
Logic Diagrams
DM74ALS240A
DM74ALS241A
©1986 Fairchild Semiconductor Corporation
DM74ALS240A, DM74ALS241A Rev. 1.3
www.fairchildsemi.com
2
DM74ALS240A, DM74ALS241A Octal 3-STATE Bus Driver
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
I
T
A
T
STG
θ
JA
Supply Voltage
Input Voltage
Parameter
Rating
7V
7V
5.5V
0°C to +70°C
–65°C to +150°C
60.5°C/W
79.8°C/W
Voltage Applied to Disabled Output
Operating Free Air Temperature Range
Storage Temperature Range
Typical Thermal Resistance
N Package
M Package
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Operating Free Air Temperature
Min.
4.5
2
Typ.
5
Max.
5.5
0.8
–15
24
Units
V
V
V
mA
mA
°C
0
70
©1986 Fairchild Semiconductor Corporation
DM74ALS240A, DM74ALS241A Rev. 1.3
www.fairchildsemi.com
3
DM74ALS240A, DM74ALS241A Octal 3-STATE Bus Driver
Electrical Characteristics
Over recommended operating free-air temperature range (unless otherwise specified).
Symbol
V
IK
V
OH
Parameter
Input Clamp Voltage
HIGH Level Output Voltage
Conditions
V
CC
=
4.5V, I
I
=
–18mA
V
CC
=
4.5V to 5.5V, I
OH
=
–0.4mA
V
CC
=
4.5V
I
OH
=
–3mA
I
OH
=
Max.
Min.
V
CC
– 2
2.4
2
Typ. Max.
–1.5
Units
V
V
V
OL
I
I
I
IH
I
IL
I
O
I
OZH
I
OZL
I
CC
LOW Level Output Voltage
Input Current at Max. Input
Voltage
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
HIGH Level 3-STATE Output
Current
LOW Level 3-STATE Output
Current
Supply Current
V
CC
=
4.5V, I
OL
=
Max.
V
CC
=
5.5V, V
I
=
7V
V
CC
=
5.5V, V
I
=
2.7V
V
CC
=
5.5V, V
IL
=
0.4V
V
CC
=
5.5V, V
O
=
2.25V
V
CC
=
5.5V, V
O
=
2.7V
V
CC
=
5.5V, V
O
=
0.4V
V
CC
=
5.5V, ALS240A, Outputs HIGH
Outputs LOW
Outputs 3-STATE
V
CC
=
5.5V, ALS241A, Outputs HIGH
Outputs LOW
Outputs 3-STATE
–30
0.35
0.5
0.1
20
–0.1
–112
20
–20
V
mA
µA
mA
mA
µA
µA
mA
4
13
14
9
15
17
10
23
25
15
26
30
©1986 Fairchild Semiconductor Corporation
DM74ALS240A, DM74ALS241A Rev. 1.3
www.fairchildsemi.com
4
DM74ALS240A, DM74ALS241A Octal 3-STATE Bus Driver
Switching Characteristics DM74ALS240A
Over recommended operating free air temperature range.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay Time,
LOW-to-HIGH Level Output
Propagation Delay Time,
HIGH-to-LOW Level Output
Output Enable Time to HIGH
Level Output
Output Enable Time to LOW
Level Output
Output Disable Time from
HIGH Level Output
Output Disable Time from
LOW Level Output
Conditions
V
CC
=
4.5V to 5.5V,
C
L
=
50pF,
R1
=
500Ω,
R2
=
500Ω,
T
A
=
Min. to Max.
From
(Input)
A
To
(Output)
Y
Min.
2
2
Max.
9
9
13
18
10
12
Units
ns
ns
ns
ns
ns
ns
G
Y
3
3
G
Y
2
3
Switching Characteristics DM74ALS241A
Over recommended operating free air temperature range.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay Time,
LOW-to-HIGH Level Output
Conditions
From
(Input)
A
To
(Output)
Y
Min.
3
3
Max.
11
10
21
21
10
15
21
21
10
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
CC
=
4.5V to 5.5V,
C
L
=
50pF,
R1
=
500
Ω
,
Propagation Delay Time,
HIGH-to-LOW Level Output R2
=
500Ω,
Output Enable Time to HIGH T
A
=
Min. to Max.
Level Output
Output Enable Time to HIGH
Level Output
Output Disable Time to HIGH
Level Output
Output Disable Time to LOW
Level Output
Output Enable Time to HIGH
Level Output
Output Enable Time to LOW
Level Output
Output Disable Time from
HIGH Level Output
Output Disable Time from
LOW Level Output
1G
Y
3
3
1G
Y
2
3
2G
Y
7
7
2G
Y
2
3
©1986 Fairchild Semiconductor Corporation
DM74ALS240A, DM74ALS241A Rev. 1.3
www.fairchildsemi.com
5
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