74LVT2245D,112 datasheet, PDF - EEWORLD Datasheet

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74LVT2245D,112: DescriptionIC TRANSCVR NON-INVERT 3.6V 20SO; Categorylogic logic; File Size206KB，15 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com

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74LVT2245D,112 Overview

IC TRANSCVR NON-INVERT 3.6V 20SO

74LVT2245D,112 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Parts packaging code	SOP
package instruction	SOP,
Contacts	20
Manufacturer packaging code	SOT163-1
Reach Compliance Code	compliant
Other features	WITH DIRECTION CONTROL
series	LVT
JESD-30 code	R-PDSO-G20
JESD-609 code	e4
length	12.8 mm
Logic integrated circuit type	BUS TRANSCEIVER
Humidity sensitivity level	1
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	4.9 ns
Maximum seat height	2.65 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	BICMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm
Base Number Matches	1

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74LVT2245; 74LVTH2245

Rev. 5 — 10 April 2017

3.3 V octal transceiver with 30 Ω termination resistors; 3-state

Product data sheet

General description

The 74LVT2245; 74LVTH2245 is a high-performance BiCMOS product designed for V

operation at 3.3 V.

This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs

in both send and receive directions. The control function implementation minimizes

external timing requirements. The device features an output enable input (OE) for easy

cascading and a direction input (DIR) for direction control.

The 74LVT2245; 74LVTH2245 is designed with 30 Ω series resistance in both the HIGH-

state and LOW-state of the output. This design reduces line noise in applications such as

memory address drivers, clock drivers and bus transceivers and transmitters.

Features and benefits

•

30 Ω output termination resistors

Octal bidirectional bus interface

3-state buffers

Output capability: +12 mA and -12 mA

TTL input and output switching levels

Input and output interface capability to systems at 5 V supply

Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

Live insertion and extraction permitted

Power-up 3-state

No bus current loading when output is tied to 5 V bus

Latch-up protection:

–

JESD78: exceeds 500 mA

•

ESD protection:

–

MIL STD 883 method 3015: exceeds 2000 V

–

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

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