EEWORLDEEWORLDEEWORLD

Part Number

Search

TN0520N2

Description
N-Channel Enhancement-Mode Vertical DMOS FETs
File Size55KB,4 Pages
ManufacturerSUTEX
Websitehttp://www.supertex.com/
Download Datasheet Compare View All

TN0520N2 Overview

N-Channel Enhancement-Mode Vertical DMOS FETs

–O
Ordering Information
BV
DSS
/
BV
DGS
200V
240V
TE –
OLE
BS
TN0520
TN0524
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
R
DS(ON)
(max)
10Ω
10Ω
I
D(ON)
(min)
300mA
300mA
V
GS(th)
(max)
1.5V
1.5V
Order Number / Package
TO-39
TN0520N2
TO-92
TN0520N3
TN0524N3
Die
TN0520ND
TN0524ND
MIL visual screening available
7
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
High Reliability Devices
See pages 5-4 and 5-5 for MILITARY STANDARD Process
Flows and Ordering Information.
Features
Low threshold —1.5V max.
High input impedance
Low input capacitance — 45pF typical
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
Distance of 1.6 mm from case for 10 seconds.
7-39
BV
DSS
BV
DGS
±
20V
-55°C to +150°C
300°C
DGS
SGD
TO-39
Case: DRAIN
TO-92
Note: See Package Outline section for dimensions.

TN0520N2 Related Products

TN0520N2 TN0520 TN0520N3 TN0524N3 TN0524 TN0524ND TN0520ND
Description N-Channel Enhancement-Mode Vertical DMOS FETs N-Channel Enhancement-Mode Vertical DMOS FETs N-Channel Enhancement-Mode Vertical DMOS FETs N-Channel Enhancement-Mode Vertical DMOS FETs N-Channel Enhancement-Mode Vertical DMOS FETs N-Channel Enhancement-Mode Vertical DMOS FETs N-Channel Enhancement-Mode Vertical DMOS FETs

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1467  2366  1629  220  1715  30  48  33  5  35 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号