SP2996B
2 Amp DDR Bus Termination Regulator
September 2010
Rev. 2.0.0
GENERAL DESCRIPTION
The SP2996B voltage regulator is designed to
convert voltage supplies ranging from 1.6V to
6V into a desired output voltage which is
adjusted by an external resistor divider.
The regulator is capable of sourcing or sinking
up to 2A of Continuous current while
regulating an output voltage to within 20mV.
The SP2996B provides an excellent voltage
source for active termination schemes of high
speed transmission lines such as those seen in
high speed memory buses and distributed
backplane designs when used in conjunction
with series termination resistors. The voltage
output of the regulator can be used as a
termination voltage for DDR SDRAM, and it
meets the JEDEC SSTL-2 and SSTL-3
specifications. Current limits in both sourcing
and sinking mode, plus on-chip thermal
shutdown make the circuit tolerant of output
fault conditions.
APPLICATIONS
•
DDR Memory Termination
•
Active Bus Termination
•
Supply Splitter
FEATURES
•
Capable of Sourcing and sinking 2A
Continuous Current
•
Supports both DDR1 (1.25V
TT
) and
DDR2 (0.9V
TT
) Requirements
•
Low Output Voltage Offset, ± 20mV
•
Thermal and Current Limit Protection
•
Integrated Power MOSFETs
•
Generates Termination for SSTL-2
•
High Accuracy Output at Full Load
•
Adjustable V
OUT
by External Resistors
•
Minimal External Components
•
Available in 8-Pin NSOIC Package
TYPICAL APPLICATION DIAGRAM
Fig. 1: SP2996B Application Diagram
Exar Corporation
48720 Kato Road, Fremont CA 94538, USA
www.exar.com
Tel. +1 510 668-7000 – Fax. +1 510 668-7001
SP2996B
2 Amp DDR Bus Termination Regulator
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of
the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect
reliability.
Supply Voltage .......................................... -0.3V to 7.0V
Junction Temperature Range.................. -40°C to +125°C
Storage Temperature .............................. -65°C to 150°C
OPERATING RATINGS
Operating Temperature Range ................. -40°C to +85°C
Thermal Resistance
θ
JA
.....................................160°C/W
Thermal Resistance
θ
JC
...................................... 40°C/W
ELECTRICAL SPECIFICATIONS
Specifications with standard type are for an Operating Ambient Temperature of T
A
= 25°C only; limits applying over the full
Operating Junction Temperature range are denoted by a “•”. Minimum and Maximum limits are guaranteed through test,
design, or statistical correlation. Typical values represent the most likely parametric norm at T
A
= 25°C, and are provided
for reference purposes only. Unless otherwise indicated, V
IN
= 2.5V, V
CNTL
= 3.3V, V
REF
= 0.5xV
IN
, C
OUT
= 10µF (ceramic),
T
A
= 25°C.
Parameter
Input Voltage Range (DDR 1/2)
V
IN
Input Voltage Range (DDR 1/2)
V
CNTL
Output Voltage V
OUT
Output Offset Voltage V
OS
Load Regulation (DDR 1/2)
∆V
LOR
Quiescent Current I
Q
Operating Current of V
CNTL
, I
CNTL
Bias Current of V
REF
Current Limit I
IL
Thermal Protection
Thermal Shutdown Temperature
T
SD
Thermal Shutdown Hysteresis
Shutdown Specifications
0.8
Shutdown Threshold V
TRIGGER
0.2
Note
Note
Note
Note
1:
2:
3:
4:
V
Output ON
V
REF
= 0V
Output OFF
V
REF
= 1.25V
1.25V
0V
125
150
30
°C
°C
(note 4)
3.3V
≤
V
CNTL
≤
5V, guaranteed by design
Guaranteed by design
2.2
3
-20
10
10
8
3
Min.
1.6
3.0
Typ.
2.5/1.8
3.3
V
REF
+20
25
25
30
10
1
4.5
3.6
Max.
Units
V
V
V
mV
mV
mV
µA
mA
µA
A
Conditions
(note 4)
Keep V
CNTL
≥V
IN
on operation power on
and power off sequences
(note 4)
I
OUT
= 0mA
I
OUT
= 0mA
No load
I
OUT
= 0.1mA to +2A
I
OUT
= 0.1mA to -2A
V
REF
< 0.2V, V
OUT
= OFF
No load
V
REF
= 1.25V
(note 3)
V
OS
offset is the voltage measurement defined as V
OUT
subtracted from V
REF
.
Load regulation is measured at constant junction temperature, using pulse testing with a low ON time.
Current limit is measured by pulsing a short time.
In order to safely operate your system, V
CNTL
must be > V
IN
.
© 2010 Exar Corporation
2/9
Rev. 2.0.0
SP2996B
2 Amp DDR Bus Termination Regulator
BLOCK DIAGRAM
Fig. 2: SP2996B Block Diagram
PIN ASSIGNMENT
Fig. 3: SP2996B Pin Assignment
PIN DESCRIPTION
Name
V
IN
GND
V
REF
V
OUT
V
CNTL
V
CNTL
V
CNTL
V
CNTL
Pin Number
1
2
3
4
5
6
7
8
Power Input Voltage
Ground Signal
Reference Input Voltage.
This input can also be used as an enable signal. Refer to typical application circuit.
Output Voltage
Voltage for the driver circuit and all analog blocks
Description
ORDERING INFORMATION
Part Number
SP2996BEN-L
Temperature
Range
-40°C≤T
A
≤+85°C
-40°C≤T
A
≤+85°C
Marking
SP2996BE
YYWWL
X
SP2996BE
YYWWL
X
Package
SOIC-8
Packing
Quantity
Bulk
Note 1
Lead Free
Note 2
SP2996BEN-L/TR
SOIC-8
2.5K/Tape & Reel Lead Free
“YY” = Year – “WW” = Work Week – “L” = Lead Free Indicator - “X” = Lot Number; when applicable.
© 2010 Exar Corporation
3/9
Rev. 2.0.0
SP2996B
2 Amp DDR Bus Termination Regulator
TYPICAL PERFORMANCE CHARACTERISTICS
All data taken at V
IN
= 2.5V, V
CNTL
= 3.3V, V
REF
= 0.5xV
IN
, C
OUT
= 10µF (ceramic), T
A
= 25°C, unless otherwise specified -
Schematic and BOM from Application Information section of this datasheet.
Fig. 4: Turn-on Threshold vs Temperature
Fig. 5: Turn-on Threshold vs Temperature
Fig. 6: Sinking Current (Peak) vs Temperature
Fig. 7: Sourcing Current (Peak) vs Temperature
Fig. 8: Output Offset Voltage vs Temperature
© 2010 Exar Corporation
4/9
Rev. 2.0.0
SP2996B
2 Amp DDR Bus Termination Regulator
Fig. 9: Output Short Circuit (Sinking)
Fig. 10: Output Short Circuit (Sourcing)
Fig. 11: Transient Response @ 1.25V
TT
/2A
Fig. 12: Transient Response @ 1.25V
TT
/2A
© 2010 Exar Corporation
5/9
Rev. 2.0.0
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