Atmel AT42QT2160
16-key QMatrix Touch Sensor IC
DATASHEET
Features
Number of keys:
up to 16 keys, and one slider (constructed from 2 to 8 keys)
Technology:
patented spread-spectrum charge-transfer (transverse mode)
Number of I/O lines:
11 (3 dedicated – configurable for input or output, 8 shared – output only)
PWM control for LED driving
Key outline sizes:
6 mm × 6 mm or larger (panel thickness dependent); widely different sizes and
shapes possible
Key spacings:
8 mm or wider, center to center (panel thickness dependent)
Slider design:
2 to 8 keys placed in sequence, same design as keys
Electrode design:
two-part electrode shapes (drive-receive); wide variety of possible layouts
PCB layers required:
one layer (with jumpers), two layers (no jumpers)
Electrode materials:
PCB, FPCB, silver or carbon on film, ITO on film
Panel materials:
plastic, glass, composites, painted surfaces (low particle density metallic
paints possible)
Adjacent metal:
compatible with grounded metal immediately next to keys
Panel thickness:
up to 3 mm glass, 2.5 mm plastic (key size dependent)
Key sensitivity:
individually settable via simple commands over I
2
C-compatible interface
Interface:
I
2
C-compatible slave mode (100 kHz)
Moisture tolerance:
Increased moisture tolerance based on hardware design and firmware tuning
Signal processing:
self-calibration, auto drift compensation, noise filtering
Adjacent Key Suppression
®
(AKS
®
) technology
Applications:
Laptop, mobile, consumer appliances, PC peripheral
This datasheet is applicable to revision 4R0 chips only
Operating Voltage:
1.8 V – 5.5 V
Package:
28-pin 4 × 4 mm QFN RoHS compliant
9502C–AT42–09/2014
1.
1.1
Pinout and Schematic
Pinout Configuration
GPIO1
I2CA1
22
RST
Y1A
GPIO2
GPIO3
VDD
VSS
X6
X7
CHANGE
1
2
3
4
5
6
7
28
27
Y0A
26
25
24
SDA
23
SCL
21
I2CA0
Y1B
Y0B
VSS
VDD
VDD
X5
20
19
QT2160
18
17
16
15
14
8
9
10
11
12
13
X1
SMP
X0
X2
X3
1.2
Pinout Descriptions
Pin Listing
If Unused, Connect
To…
–
–
–
–
Leave open
Leave open
Leave open
–
–
Leave open
Leave open
Table 1-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
Name
GPIO2
GPIO3
Vdd
Vss
X6
X7
CHANGE
Vref
SMP
X0
X1
Type
I/O
I/O
P
P
O
O
OD
P
O
O
O
Comments
General purpose input/output 2
General purpose input/output 3
Power
Supply ground
X matrix drive line / shared GPO X6
X matrix drive line / shared GPO X7
State change notification
Supply ground
Sample output.
X matrix drive line / shared GPO X0
X matrix drive line / shared GPO X1
VREF
X4
AT42QT2160 [DATASHEET]
9502C–AT42–09/2014
2
Table 1-1.
Pin Listing (Continued)
If Unused, Connect
To…
Leave open
Leave open
Leave open
Leave open
–
–
–
Leave open
Leave open
–
–
–
–
Leave open or Vdd
Leave open
Leave open
–
Pin
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Name
X2
X3
X4
X5
Vdd
Vdd
Vss
Y0B
Y1B
I2CA0
I2CA1
SDA
SCL
RST
Y0A
Y1A
GPIO1
Type
O
O
O
O
P
P
P
I/O
I/O
I
I
OD
OD
I
I/O
I/O
I/O
Comments
X matrix drive line / shared GPO X2
X matrix drive line / shared GPO X3
X matrix drive line / shared GPO X4
X matrix drive line / shared GPO X5
Power
Power
Supply ground
Y line connection
Y line connection
I
2
C address select
I
2
C address select
Serial Interface Data
Serial Interface Clock
Reset low; has internal 30k - 60k pull-up
Y line connection
Y line connection
General purpose input/output 1
I
OD
Input only
Open drain output
O
P
Output only, push-pull
Ground or power
I/O
Input/output
AT42QT2160 [DATASHEET]
9502C–AT42–09/2014
3
1.3
Schematic
Figure 1-1. Typical Circuit
follow regulator manufacturers recommended values for input
and output bypass capacitors.
tightly wire a 100nF bypass capacitor between Vdd and Vss (pins 3 and 4).
Vunreg
VDD
VREG
Rx7
Rx6
VDD
Rx5
Rx4
Rp
SDA
SCL
VDD
Rchg
CHANGE
Ry0
I2C ADDRESS
SELECT
MATRIX Y SCAN IN
General purpose
inputs/outputs
Rp
Rx3
Rx2
Rx1
I2C
Rx0
MATRIX X DRIVE
QT2160
Cs0
Ry1
Cs1
Rs1
Rs0
Notes:
1) the central pad on the underside of the chip is a
Vss pin and should be connected to ground.
Do not put any other tracks underneath the body
of the chip.
2) it is important to place all Rx, Ry, Cs and Rs
components physically near to the chip.
3) leave YnA, YnB unconnected
if not used.
Check the following sections for component values:
Section 3.3 on page 8:
Cs capacitors (Cs0 – Cs1)
Section 3.5 on page 10:
Sample resistors (Rs0 – Rs1)
Section 3.7 on page 10:
Matrix resistors (Rx0 – Rx7, Ry0 – Ry1)
Section 3.11 on page 15:
Voltage levels
Section 5.4 on page 22:
SDA, SCL pull-up resistors (Rp)
Section 5.5 on page 22:
CHANGE resistor (Rchg)
Section 5.2 on page 21:
I
2
C addresses
AT42QT2160 [DATASHEET]
9502C–AT42–09/2014
4
Figure 1-2. Inputs/Outputs
GPIO
n
where
n
= 1 3
GPIO
n
where
n
= 1 3
GPIO
n
/ X
m
where
n
= 1 3
m
=0 7
GPIO
n
/ X
m
where
n
= 1 3
m
=0 7
* Low-pass filter can be added
to filter out burst pulses on
shared GPOs (X0 X7)
AT42QT2160 [DATASHEET]
9502C–AT42–09/2014
5
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