The TS13401 is a galvanically isolated 60V power FET
driver with bi-directional blocking. The state of the
switch and other product features are controlled by
sending commands on the CLK input.
The TS13401 supports several sensing modes where
the switch state, load current, supply voltage and
device temperature can be sampled. The digitized
measurements can be read back from the device on
the DATA pin when requested on the CLK pin. In
addition, TS13401 supports power transfer from the
system‘s AC supply to the low-voltage controller
domain.
The TS13401 includes several protection features. The
switch will open in self protection if current exceeds
the over-current limit or if the device temperature limit
is exceeded. The switch will remain open until a new
turn on sequence is given through CLK.
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•
Summary Specification
Junction operating temperature -40 °C to 125 °C
Packaged in a 20 pin QFN (3mm x 3mm)
Product is lead-free, Halogen Free, RoHS / WEEE
compliant
Applications
•
•
•
•
•
•
•
Power load/rail switching
Input supply multiplexing
Isolated power supplies
Solid state relays
HVAC control
Sprinkler control
Internet of Things (IoT)
Typical Application
C
VDD
C
VGG5
C
VGG10
R
WD
Regulator
C
PTO
C
REG
PTO
SYSP
SW1
VCC
AD2
AD1
AD0
GATE2
SW2
SYSM
SUB
C
SUB
Load
VDD SRC
VGG5 VGG10
WD
C
WD
C
SYS
V
AC
TS13401
GATE1
µC
GPIO1
C
VCC
GPIO2
C
ISO
CLK
DATA
C
DATA
TS13401
Final Datasheet
July 21, 2017
Rev 1.0
1 of 19
Semtech
Proprietary & Confidential
Pin Description
Pin Symbol
SUB
SYSP
SYSM
VDD
PTO
CLK
DATA
AD2
AD1
N/C
AD0
WD
SRC
VGG5
VGG10
SW2
GATE2
SRC
GATE1
SW1
SUB
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PAD
Function
IC Substrate Connection
Positive System Voltage
Negative System Voltage
Bias Voltage Output
Power Transfer Output
Clock Input
Data Output
Address Select 2
Address Select 1
No Connect
Address Select 0
Watch Dog
Source
Bias Voltage Output
Bias Voltage Output
Switch Output Node 2
Gate 2
Source
Gate 1
Switch Output Node 1
Thermal Input
Connect thermally to the FET chip
Connect to gate of switch between SRC and SW2
Connect to source of external switches
Connect to gate of switch between SRC and SW1
For logic 0, must be tied to SRC on PCB
For logic 1, must be tied to VGG5 on PCB
Control input for latching vs non-latching switch
Bulk connection of switch, connect to VGG5, VGG10
capacitors
Connect VGG5 Capacitor to SRC
Connect VGG10 Capacitor to SRC
Description
Connect substrate capacitor from SUB to SYSM
Power is harvested from the SW pins
Power is harvested from the SW pins
Connect VDD Capacitor to SYSM
Connect to Power Transfer Capacitor C
PTO
Galvanically Isolated Clock Input
Galvanically Isolated Data Output
For logic 0, must be tied to SRC on PCB
For logic 1, must be tied to VGG5 on PCB
For logic 0, must be tied to SRC on PCB
For logic 1, must be tied to VGG5 on PCB
TS13401
Final Datasheet
July 21, 2017
Rev 1.0
2 of 19
Semtech
Proprietary & Confidential
Functional Block Diagram
Figure 1: TS13401 Block Diagram
Absolute Maximum Ratings
Over operating free–air temperature range unless otherwise noted
(1, 4)
Parameter
SW1, SW2
(2)
SYSP, SYSM, PTO
(3)
CLK , DATA, VDD, AD2, AD1, AD0, WD
(3)
VGG5
(2)
GATE1, GATE2, VGG10
(2)
SUB
(2)
Operating Junction Temperature Range, T
J
Storage Temperature Range, T
STG
Electrostatic Discharge – Human Body Model
Electrostatic Discharge – Charged Device Model
Peak IR Reflow Temperature (10 to 30 seconds)
Range
-1 to 60
-1 to 60
-0.3 to 5.5
-0.3 to 5.5
-0.3 to 11
-55 to 0.3
-40 to 125
-65 to 150
±2k
+/-500
260
Unit
V
V
V
V
V
V
°C
°C
V
V
°C
Notes:
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to SRC terminal.
(3) Voltage values are with respect to SYSM terminal.
(4) ESD testing is performed according to the respective JESD22 JEDEC standard.
TS13401
Final Datasheet
July 21, 2017
Rev 1.0
3 of 19
Semtech
Proprietary & Confidential
Thermal Characteristics
Symbol
θ
JC
T
STG
T
J MAX
T
J
Storage Temperature Range
Maximum Junction Temperature
Operating Junction Temperature Range
Parameter
Thermal Resistance Junction to Case
(1)
Value
50
-65 to 150
150
-40 to 125
Unit
°C/W
°C
°C
°C
Notes:
(1) Case Temperature is measured in the center of the case at the bottom of the package adjacent to the circuit board.
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