SY88345BL
3.3V, 3.2Gbps CML Low-Power Limiting Post
Amplifier w/ High-Gain TTL Signal Detect
General Description
The SY88345BL high-sensitivity limiting post amplifier is
designed for use in fiber-optic receivers. The device
connects to typical transimpedance amplifiers (TIAs).
The linear signal output from TIAs can contain
significant amounts of noise and may vary in amplitude
over time. The SY88345BL quantizes these signals and
outputs CML-level waveforms.
The SY88345BL operates from a single +3.3V +10%
power supply, and over temperatures ranging from
o
o
–40 C to +85 C. With its wide bandwidth, high gain, and
signals with data rates up to 3.2Gbps and as small as
5mV
PP
can be amplified to drive devices with CML inputs
or AC-coupled CML/PECL inputs.
The SY88345BL generates a signal-detect (SD) open-
collector TTL output. A programmable signal-detect
level-set pin (SD
LVL
) sets the sensitivity of the input
amplitude detection. SD asserts high if the input
amplitude rises above the threshold sets by SD
LVL
and
de-asserts low otherwise. The enable input (EN) de-
asserts the true output signal without removing the input
signal. The SD output can be fed back to the EN input to
maintain output stability under loss-of-signal condition.
Typically, 3.5dB SD hysteresis is provided to prevent
chattering.
Datasheet and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Features
•
•
•
•
•
•
•
•
•
Single 3.3V power supply
155Mbps to 3.2Gbps operation
Low-noise CML data outputs
Chatter-free Open-Collector TTL signal detect (SD)
output with internal 4.75kΩ
pull-up
resistor
TTL EN input
Internal 50Ω
input termination
Programmable SD level set (SD
LVL
)
Ideal for multi-rate applications
Available in a tiny 10-pin EPAD MSOP and 16-pin
QFN package
Applications
•
•
•
•
•
APON/BPON, EPON, GPON and GEPON
Gigabit Ethernet
1X and 2X Fibre Channel
SONET/SDH: OC-3/12/24/48–STMD/4/8/16
High-gain line driver and line receiver
Markets
•
•
•
•
FTTP/FTTH
Optical transceivers
Datacom/Telecom
Low-gain TIA interface
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 2007
M9999-021207-B
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88345BL
Typical Application
Pin Configuration
16-Pin QFN
10-Pin EPAD-MSOP (K10-2)
Ordering Information
Part Number
SY88345BLEY
SY88345BLEYTR
SY88345BLMG
Notes:
1. Tape and Reel.
2. Pb-Free package is recommended for new designs.
(2)
(1, 2)
(1)
Package
Type
K10-2
K10-2
QFN-16
QFN-16
Operating
Range
Industrial
Industrial
Industrial
Industrial
Package Marking
345B with Pb-Free bar line indicator
345B with Pb-Free bar line indicator
345B with Pb-Free bar line indicator
345B with Pb-Free bar line indicator
Lead Finish
Matte-Sn
Matte-Sn
NiPdAu Pb-Free
NiPdAu Pb-Free
SY88345BLMGTR
February 2007
2
M9999-021207-B
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88345BL
Pin Description
Pin Number
(MSOP)
1
2
3
4
5
6
Exposed Pad
7
8
9
10
Pin Number
(QFN)
15
1
4
6
14
2, 3, 10, 11
Exposed Pad
7
9
12
5, 8, 13, 16
Pin Name
EN
DIN
/DIN
VREF
SDLVL
GND
Input: Default is
maximum sensitivity
Ground
Open Collector
TTL Output with
Internal 4.75kΩ
pull-up
Resistor
CML Output
CML Output
Power supply
Type
TTL Input: Default is
high.
Data Input
Data Input
Pin Function
Enable: De-asserts true data output when LOW.
True data input w/50Ω
termination to V
REF
.
Complementary data input w/50Ω
termination to
V
REF
.
Reference Voltage: Placing a capacitor here to V
CC
helps stabilize SD
LVL
.
Signal-detect Level Set: A resistor from this pin to
V
CC
sets the threshold for the data input amplitude at
which the SD output will be asserted.
Device ground. Exposed pad must be connected to
PCB ground plane.
Signal-detect: Asserts high when the data input
amplitude rises above the threshold sets by SD
LVL
.
Complementary data output.
True data output.
Positive power supply.
SD
/DOUT
DOUT
VCC
February 2007
3
M9999-021207-B
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88345BL
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) .................................... 0V to +4.0V
Input Voltage (DIN, /DIN) ................................... 0 to V
CC
Output Current (I
OUT
) ............................................+25mA
EN Voltage ......................................................... 0 to V
CC
V
REF
Current……………………………-800uA to +500uA
SD
LVL
Voltage ................................................ V
REF
to V
CC
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (T
s
) .....................-65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
CC
) ................................. +3.0V to +3.6V
Ambient Temperature (T
A
) .......................–40°C to +85°C
Junction Temperature (T
J
) .....................–40°C to +125°C
Junction Thermal Resistance
QFN
(θ
JA
) Still-air ................................................ 61°C/W
(Ψ
JB
)............................................................ 38°C/W
EPAD-MSOP
(θ
JA
) Still-air ................................................ 38°C/W
(Ψ
JB
)............................................................ 22°C/W
DC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
LOAD
= 50Ω
to V
CC
; T
A
= –40°C to +85°C.
Symbol
I
CC
SD
LVL
V
OH
V
OL
V
OFFSET
Z
O
Z
I
V
REF
Parameter
Power Supply Current
SD
LVL
Voltage
CML Output HIGH Voltage
CML Output LOW Voltage
Differential Output Offset
Single-Ended Output Impedance
Single-Ended Input Impedance
Reference Voltage
40
40
50
50
V
CC
-1.28
V
CC
= 3.3V
Condition
No output load
V
REF
V
CC
-0.020 V
CC
-0.005
Min
Typ
42
Max
65
V
CC
V
CC
+80
60
60
Units
mA
V
V
V
mV
Ω
Ω
V
V
CC
-0.475 V
CC
-0.400 V
CC
-0.350
TTL DC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
LOAD
= 50Ω
to V
CC
; T
A
= –40°C to +85°C.
Symbol
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (GND) on the PCB.
Ψ
JB
uses 4-layer (θ
JA
) in still-air-number, unless otherwise stated.
Parameter
EN Input HIGH Voltage
EN Input LOW Voltage
EN Input HIGH Current
EN Input LOW Current
SD Output HIGH Level
SD Output LOW Level
Condition
Min
2.0
Typ
Max
0.8
Units
V
V
µA
µA
µA
V
V
V
IN
= 2.7V
V
IN
= V
CC
V
IN
= 0.5V
V
CC
≥ 3.3V, I
OH
(max) < 160µA
V
CC
< 3.3V, I
OH
(max) < 160µA
Sinking 2mA
-300
2.4
2.0
20
100
0.5
V
February 2007
4
M9999-021207-B
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88345BL
AC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
LOAD
= 50Ω
to V
CC
; T
A
= –40°C to +85°C.
Symbol
t
r
, t
f
t
JITTER
V
ID
V
OD
T
OFF
T
ON
SD
AL
SD
DL
HYS
L
SD
AM
SD
DM
HYS
M
SD
AH
SD
DH
HYS
H
B
-3dB
A
V(Diff)
S
21
Notes:
4. Amplifier in limiting mode. Input is a 200MHz square wave.
5. Deterministic jitter measured using 3.2Gbps K28.5 pattern, V
ID
= 10mV
PP
.
6. Random jitter measured using 3.2Gbps K28.7 pattern, V
ID
= 10mV
PP
.
7. This specification defines electrical hysteresis as 20log (SD Assert/SD De-assert). The ratio between optical hysteresis and
electrical hysteresis is found to vary between 1.5 and 2, depending upon the level of received optical power and ROSA
characteristics. Based upon that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-4.5dB, as
shown in the AC characteristics table, will be 1dB-3dB.
8. See “Typical Operating Characteristics” for a graph showing how to choose a particular R
SDLVL
for a particular SD assert and its
associated de-assert amplitude.
Parameter
Output Rise/Fall Time
(20% to 80%)
Deterministic
Random
Differential Input Voltage Swing
Differential Output Voltage Swing
SD De-assert Time
SD Assert Time
Low SD Assert Level
Low SD De-assert Level
Low SD Hysteresis
Medium SD Assert Level
Medium SD De-assert Level
Medium SD Hysteresis
High SD Assert Level
High SD De-assert Level
High SD Hysteresis
3dB Bandwidth
Differential Voltage Gain
Single-ended Small-Signal Gain
32
26
R
SDLVL
= 15kΩ,
Note 8
R
SDLVL
= 15kΩ,
Note 8
R
SDLVL
= 15kΩ,
Note 7
R
SDLVL
= 5kΩ,
Note 8
R
SDLVL
= 5kΩ,
Note 8
R
SDLVL
= 5kΩ,
Note 7
R
SDLVL
= 100Ω,
Note 8
R
SDLVL
= 100Ω,
Note 8
R
SDLVL
= 100Ω,
Note 7
8
2
2
2
Condition
Note 4
Note 5
Note 6
Figure 1
V
ID
> 10mV
PP
Figure 1
5
700
800
2
2
4.5
3.0
3.5
7.5
5.0
3.5
18
12
3.5
2
38
32
4.5
4.5
23
11
Min
Typ
60
15
5
1800
950
10
10
Max
120
Units
ps
ps
PP
ps
RMS
mV
PP
mV
PP
µs
µs
mV
PP
mV
PP
dB
mV
PP
mV
PP
dB
mV
PP
mV
PP
dB
GHz
dB
dB
February 2007
5
M9999-021207-B
hbwhelp@micrel.com
or (408) 955-1690
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