Micrel, Inc.
ULTRA PRECISION DIFFERENTIAL
CML 4:1 MUX WITH 1:2 FANOUT
AND INTERNAL I/O TERMINATION
Precision Edge
SY58028U
Precision Edge
®
SY58028U
®
FEATURES
■
Selects 1 of 4 differential inputs
■
Provides two copies of the selected input
■
Guaranteed AC performance over temperature and
voltage:
• DC-to- > 10.7Gbps data rate throughput
• < 350ps IN-to-Out t
pd
• < 60ps t
r
/ t
f
times
■
Ultra low-jitter design:
• < 10ps
PP
total jitter (clock)
• < 1ps
RMS
random jitter
• < 10ps
PP
deterministic jitter
• < 0.7ps
RMS
crosstalk-induced jitter
■
Unique patended input design minimizes crosstalk
■
Accepts an input signal as low as 100mV
■
Unique patended input termination and V
T
pin
accepts DC- and AC-coupled inputs (CML, LVPECL,
LVDS)
■
Internal 50
Ω
output source termination
■
400mV CML output swing (R
L
= 50
Ω
)
■
Power supply 2.5V
±
5% or 3.3V
±
10%
■
–40
°
C to +85
°
C temperature range
■
Available in 32-pin (5mm
×
5mm) MLF
®
package
United States Patent No. RE44,134
Precision Edge
®
DESCRIPTION
The SY58028U is a 2.5V/3.3V precision, high-speed, 4:1
differential CML multiplexer capable of handling clocks up
to 7GHz and data streams up to 10.7Gbps. In addition, a
1:2 fanout buffer provides two copies of the selected inputs.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that allows customers to interface to
any differential signal (AC- or DC-coupled) as small as 100mV
without any level shifting or termination resistor networks in
the signal path. The result is a clean, stub-free, low-jitter
interface solution. The outputs are 50Ω source terminated
CML, with extremely fast rise/fall times guaranteed to be less
than 60ps.
The SY58028U operates from a 2.5V
±5%
supply or a
3.3V
±10%
supply and is guaranteed over the full industrial
temperature range of –40°C to +85°C. For applications that
require LVPECL outputs, consider the SY58029U or
SY58030U Multiplexers. The SY58028U is part of Micrel’s
high-speed, Precision Edge
®
product line.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
APPLICATIONS
■
■
■
■
■
Redundant clock and/or data distribution
All SONET/SDH clock/data distribution
Loopback
All Fibre Channel distribution
All Gigabit Ethernet clock and/or data distribution
FUNCTIONAL BLOCK DIAGRAM
IN0
50Ω
V
T0
50Ω
/IN0
V
REF-AC0
0
IN1
50Ω
V
T1
50Ω
/IN1
V
REF-AC1
IN2
50Ω
2
1
MUX
4:1
MUX
1:2
Fanout
TYPICAL PERFORMANCE
3.2Gbps Output (2
23
Ð1 PRBS)
Q0
/Q0
Q1
/Q1
Output Swing
(100mV/div.)
V
T2
50Ω
/IN2
V
REF-AC2
IN3
50Ω
V
T3
50Ω
3
TIME (100ps/div.)
Precision Edge is a registered trademark of Micrel, Inc.
Micro
LeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
M9999-082707
hbwhelp@micrel.com or (408) 955-1690
/IN3
V
REF-AC3
SEL0 (CMOS/TTL)
SEL1 (CMOS/TTL)
Rev.: D
Amendment: /0
1
Issue Date: August 2007
Micrel, Inc.
Precision Edge
®
SY58028U
PACKAGE/ORDERING INFORMATION
/IN3
VREF-AC3
VT3
IN3
/IN2
VREF-AC2
VT2
IN2
Ordering Information
(1)
Part Number
GND
VCC
Q1
/Q1
VCC
NC
SEL1
VCC
Package
Type
MLF-32
MLF-32
MLF-32
MLF-32
Operating
Range
Industrial
Industrial
Industrial
Industrial
Package
Marking
SY58028U
SY58028U
SY58028U with
Pb-Free bar-line indicator
SY58028Uwith
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Pb-Free
NiPdAu
Pb-Free
NiPdAu
32 31 30 29 28 27 26 25
SY58028UMI
SY58028UMITR
(2)
SY58028UMG
(3)
SY58028UMGTR
(2, 3)
IN0
VT0
VREF-AC0
/IN0
IN1
VT1
VREF-AC1
/IN1
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
24
23
22
21
20
19
18
17
32-Pin MLF
®
(MLF-32)
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number
1, 4
5, 8
25, 28
29, 32
Pin Name
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
Pin Function
Differential Inputs: These inputs accept AC- or DC-coupled signals as small as 100mV.
Each pin of a pair internally terminates to a V
T
pin through 50Ω. Note that these
inputs will default to an indeterminate state if left open. If an input pair is not used, connect
one input of the pair to ground through a 1kΩ resistor and the complement to V
CC
through a
825Ω resistor. Unused V
T
and V
REF-AC
may also be left open. Please refer to the “Input
Interface Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a V
T
pin. The V
T
pin provides a center-tap to the termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details.
This single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. Note
that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic
HIGH state if left open. Input logic threshold is V
CC
/2. See “Truth Table” for select control.
No Connect.
Positive Power Supply: Bypass with 0.1µF0.01µF low ESR capacitors.
Differential Outputs: These CML output pairs are copies of the selected input. Unused
output pairs may be left floating. See “Output Interface” section for termination guidelines.
Ground. Ground pin and exposed pad must be connected to the same ground plane.
Reference Voltage: This reference output is equivalent to V
CC
–1.4V. It is used for AC-coupled
inputs. When interfacing to AC input signals, connect V
REF-AC
directly to the V
T
pin and
bypass with 0.01µF low ESR capacitor to V
CC
. See “Input Interface Applications” section.
Maximum sink/source current is 0.5mA.
2, 6, 26, 30
15, 18
14, 19
10, 13, 16
17, 20, 23
11, 12
21, 22
9, 24
3, 7, 27, 31
TRUTH TABLE
SEL1
0
0
1
1
SEL0
0
1
0
1
IN0 Input Selected
IN1 Input Selected
IN2 Input Selected
IN3 Input Selected
M9999-082707
hbwhelp@micrel.com or (408) 955-1690
GND
VCC
/Q0
Q0
VCC
NC
SEL0
VCC
VT0, VT1
VT2, VT3
SEL0, SEL1
NC
VCC
/Q0, Q0
/Q1, Q1
GND,
Exposed Pad
VREF-AC0
VREF-AC1
VREF-AC2
VREF-AC3
2
Micrel, Inc.
Precision Edge
®
SY58028U
Absolute Maximum Ratings
(1)
Power Supply Voltage (V
CC
) ...................... –0.5V to +4.0V
Input Voltage (V
IN
) ......................................... –0.5V to V
CC
CML Output Voltage (V
OUT
) ........... V
CC
–1.0V to V
CC
+0.5V
Termination Current
(3)
Source or sink current on V
T
pin ........................
±100mA
Input Current
Source or sink current on IN, /IN pin ....................
±50mA
Lead Temperature (soldering, 20 sec.) ..................... 260°C
Storage Temperature Range (T
S
) ........... –65°C to +150°C
Operating Ratings
(2)
Power Supply Voltage (V
CC
) ............... +2.375V to +2.625V
............................................................ +3.0V to +3.6V
Ambient Temperature Range (T
A
) ............. –40°C to +85°C
Package Thermal Resistance
(4)
MLF
®
(θ
JA
)
Still-Air ............................................................. 35°C/W
MLF
®
(ψ
JB
)
Junction-to-Board .............................................. 2°C/W
DC ELECTRICAL CHARACTERISTICS
(5)
T
A
= –40°C to 85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
DIFF_IN
R
IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
T
IN
V
REF-AC
Notes:
1. Permanent device damage may occur if ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional
operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability, use for input of the same package only.
4. Thermal performance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (GND) on the PCB.
ψ
JB
uses 4-layer
θ
JA
in still air number unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IH
(min) not lower than 1.2V.
Parameter
Power Supply Voltage
Power Supply Current
Differential Input Resistance (IN-to-/IN)
Input Resistance (IN-to-V
T
, /IN-to-V
T
)
Input HIGH Voltage (IN-to-/IN)
Input LOW Voltage (IN-to-/IN)
Input Voltage Swing (IN-to-/IN)
Differential Input Voltage Swing (IN-to-/IN)
Max Input Voltage (IN-to-V
T
)
Reference Voltage
Condition
V
CC
= 2.5V
V
CC
= 3.3V
No load, max. V
CC
Min
2.375
3.0
Typ
2.5
3.3
120
Max
2.625
3.6
150
120
60
V
CC
V
IH
–0.1
1.7
Units
V
V
mA
Ω
Ω
V
V
V
V
80
40
Note 6
V
CC
–1.6
0
See Figure 1a.
See Figure 1b.
0.1
0.2
100
50
1.28
V
CC
–1.3 V
CC
–1.2 V
CC
–1.1
V
V
M9999-082707
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
Precision Edge
®
SY58028U
CML OUTPUT DC ELECTRICAL CHARACTERISTICS
(7)
V
CC
= 2.5V
±5%
or 3.3V
±10%;
T
A
= -40°C to 85°C; R
L
= 100Ω across each output pair or equivalent; unless otherwise stated.
Symbol
V
OH
V
OUT
V
DIFF_OUT
R
OUT
Parameter
Output HIGH Voltage
Output Voltage Swing
Differential Output Voltage Swing
Output Source Impedance
See Figure 1a.
See Figure 1b.
Condition
Min
V
CC
–0.020
325
650
40
400
800
50
60
Typ
Max
V
CC
Units
V
mV
mV
Ω
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS
(7)
V
CC
= 2.5V
±5%
or 3.3V
±10%;
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
IH
V
IL
I
IH
I
IL
Note:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
SEL0, SEL1
SEL0, SEL1
Min
2.0
Typ
Max
Units
V
0.8
40
–300
V
µA
µA
M9999-082707
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY58028U
AC ELECTRICAL CHARACTERISTICS
(8)
V
CC
= 2.5V
±5%
or 3.3V
±10%;
R
L
= 100Ω across each output pair, or equivalent; T
A
= –40°C to +85°C, V
IN
≥
100mV unless otherwise stated.
Symbol
f
MAX
t
pd
t
pd
Tempco
t
SKEW
Parameter
Maximum Operating Frequency
V
OUT
≥
200mV
Propagation Delay (Diff)
(IN to Q)
(SEL to Q)
Differential Propagation Delay
Temperature Coefficient
Output-to-Output
Part-to-Part
t
JITTER
Data
Random Jitter
Deterministic Jitter
Clock
Cycle-to-Cycle Jitter
Total Jitter
Crosstalk Induced Jitter
(Adjacent Channel)
t
r
, t
f
Notes:
8. High frequency AC electricals are guaranteed by design and characterization.
9. Output-to-output skew is measured between outputs under identical input conditions.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps to 3.2Gbps.
12. Deterministic jitter is measured at 2.5Gbps to 3.2Gbps, with both K28.5 and 2
23
–1 PRBS pattern.
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T
n
–T
n–1
where T is the time between rising edges of the output
signal.
14. Total jitter definition: with an ideal clock input of frequency
≤
f
MAX
, no more than one output edge in 10
12
output edges will deviate by more than the
specified peak-to-peak jitter value.
15. Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the inputs.
Condition
NRZ Data
Clock
Min
10.7
Typ
Max
Units
Gbps
7
170
100
115
260
340
500
GHz
ps
ps
fs/°C
20
50
ps
ps
ps
RMS
ps
PP
ps
RMS
ps
PP
ps
RMS
ps
V
IN
≥
100mV
Note 9
Note 10
Note 11
Note 12
Note 13
Note 14
Note 15
20% to 80%, Full output swing
20
2.5Gbps to 3.2Gbps
2.5Gbps to 3.2Gbps
7
1
10
1
10
0.7
45
60
Output Rise/Fall Time
SINGLE-ENDED AND DIFFERENTIAL SWINGS
V
IN
,
V
OUT
400mV (Typ.)
V
DIFF_IN
,
V
DIFF_OUT
800mV (Typ.)
Figure 1a. Single-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
M9999-082707
hbwhelp@micrel.com or (408) 955-1690
5
PCB Design
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