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SY10ELT21LZGTR

Description
PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size54KB,5 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Related ProductsFound2parts with similar functions to SY10ELT21LZGTR
Download Datasheet Parametric View All

SY10ELT21LZGTR Overview

PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8

SY10ELT21LZGTR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMicrochip
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
maximum delay2.5 ns
Interface integrated circuit typePECL TO TTL TRANSLATOR
JESD-30 codeR-PDSO-G8
JESD-609 codee4
length4.93 mm
Humidity sensitivity level1
Number of digits1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output latch or registerNONE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.73 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.95 mm
Base Number Matches1
Micrel, Inc.
3.3V DIFFERENTIAL
LVPECL-to-LVTTL
TRANSLATOR
Precision Edge
®
SY10ELT21L
Precision Edge
®
SY100ELT21L
SY10ELT21L
SY100ELT21L
FEATURES
s
s
s
s
s
3.3V power supply
2.0ns typical propagation delay
Low power
Differential LVPECL inputs
24mA TTL outputs
Precision Edge
®
DESCRIPTION
The SY10/100ELT21L are single differential LVPECL-
to-LVTTL translators using a single +3.3V power supply.
Because LVPECL (Low Voltage Positive ECL) levels are
used, only +3.3V and ground are required. The small
outline 8-lead SOIC package and low skew single gate
design make the ELT21L ideal for applications that require
the translation of a clock or data signal where minimal
space, low power, and low cost are critical.
V
BB
allows a differential, single-ended, or AC-coupled
interface to the device. If used, the V
BB
output should be
bypassed to V
CC
with 0.01µF capacitor.
Under open input conditions, the /D will be biased at a
V
CC
/2 voltage level and the D input will be pulled to
ground. This condition will force the Q output low to
provide added stability.
The ELT21L is available in both ECL standards: the
10ELT is compatible with positive ECL 10H logic levels,
while the 100ELT is compatible with positive ECL 100K
logic levels.
s
Flow-through pinouts
s
Available in 8-pin SOIC package
PIN NAMES
Pin
Q
D, /D
V
CC
V
BB
GND
TTL Output
Differential LVPECL Inputs
+3.3V Supply
Reference Output
Ground
Function
Precision Edge is a registered trademark of Micrel, Inc.
M9999-031506
hbwhelp@micrel.com or (408) 955-1690
Rev.: D
Amendment: /0
1
Issue Date: March 2006

SY10ELT21LZGTR Similar Products

Part Number Manufacturer Description
SY10ELT21LZG-TR Microchip(微芯科技) Translation - Voltage Levels
SY10ELT21LZITR Micrel ( Microchip ) PECL to TTL Translator, 1 Func, True Output, ECL10K, PDSO8, 0.150 INCH, SOIC-8

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