Data Sheet
FEATURES
Digital Controller for Isolated
Power Supply with PMBus Interface
ADP1052
GENERAL DESCRIPTION
The
ADP1052
is an advanced digital controller with a PMBus™
interface targeting high density, high efficiency, dc-to-dc power
conversion. This controller implements voltage mode control with
high speed, input line feedforward for enhanced transient and
improved noise performance. The
ADP1052
has six programmable
pulse-width modulation (PWM) outputs capable of controlling
most high efficiency power supply topologies, with added control
of synchronous rectification (SR). The device includes adaptive
dead time compensation to improve efficiency over the load range,
and programmable light load mode operation, combined with
low power consumption, to reduce system standby power losses.
The
ADP1052
implements several features to enable a robust
system of parallel and redundant operation for customers that
require high availability or parallel connection. The device provides
synchronization, reverse current protection, prebias startup,
accurate current sharing between power supplies, and conditional
overvoltage techniques to identify and safely shut down an
erroneous power supply in parallel operation mode.
The
ADP1052
is based on flexible state machine architecture
and is programmed using an intuitive GUI. The easy to use
interface reduces design cycle time and results in a robust,
hardware coded system loaded into the built-in EEPROM. The
small size (4 mm × 4 mm) LFCSP package makes the
ADP1052
ideal for ultracompact, isolated dc-to-dc power module or
embedded power designs.
Peak data telemetry recording
High speed input voltage feedforward control
6 pulse-width modulation (PWM) logic outputs with 625 ps
resolution
Switching frequency: 49 kHz to 625 kHz
Frequency synchronization as master and slave device
Multiple energy saving modes
Adaptive dead time compensation for efficiency optimization
Low power consumption: 100 mW typical
Direct parallel control for power supplies without OR’ing devices
Accurate droop current share
Prebias startup
Reverse current protection
Conditional overvoltage protection
Extensive fault detection and protection
PMBus compliant
Graphical user interface (GUI) for ease of programming
On-board EEPROM for programming and data storage
Available in a 24-lead, 4 mm × 4 mm LFCSP
−40°C to +125°C operating temperature
APPLICATIONS
High density isolated dc-to-dc power supplies
Intermediate bus converters
High availability parallel power systems
Server, storage, industrial, networking, and communications
infrastructure
TYPICAL APPLICATIONS CIRCUIT
LOAD
DC
INPUT
DRIVER
SR1
CS1
OUTA
OUTB
OUTC
OUTD
RES ADD RTD VCORE
SR2
VF CS2– CS2+
OVP
VS+ VS–
DRIVER
i
Coupler
®
ADP1052
PG/ALT CTRL SDA
SCL
SYNI/FLGI
VDD
AGND
PMBus
12520-001
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADP1052
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Typical Applications Circuit............................................................ 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
Soldering ........................................................................................ 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 12
Theory of Operation ...................................................................... 14
PWM Outputs (OUTA, OUTB, OUTC, OUTD, SR1, and
SR2) .............................................................................................. 15
Synchronous Rectification ........................................................ 15
PWM Modulation Limit and 180° Phase Shift ....................... 16
Adaptive Dead Time Compensation (ADTC)........................ 17
Light Load Mode and Deep Light Load Mode ....................... 17
Frequency Synchronization ...................................................... 18
Output Voltage Sense and Adjustment .................................... 20
Digital Compensator .................................................................. 21
Closed-Loop Input, Voltage Feedforward Control, and VF
Sense ............................................................................................. 22
Open-Loop Input, VF Operation ............................................. 23
Open-Loop Operation ............................................................... 23
Current Sense .............................................................................. 24
Soft Start and Shutdown ............................................................ 25
Volt-Second Balance Control.................................................... 27
Constant Current Mode ............................................................ 27
Pulse Skipping ............................................................................. 28
Prebias Startup ............................................................................ 28
Output Voltage Drooping Control ........................................... 28
VDD and VCORE ...................................................................... 29
Chip Password ............................................................................ 29
Power Monitoring, Flags, and Fault Responses .......................... 30
Flags.............................................................................................. 30
Voltage Readings ........................................................................ 33
Current Readings ........................................................................ 33
Power Readings........................................................................... 33
Data Sheet
Duty Cycle Reading ................................................................... 34
Switching Frequency Reading .................................................. 34
Temperature Reading................................................................. 34
Temperature Linearization Scheme ......................................... 35
PMBus Protection Commands................................................. 35
Manufacturer Specific Protection Commands....................... 37
Manufacturer Specific Protection Responses ......................... 39
Peak Data Telemetry .................................................................. 40
Power Supply Calibration and Trim ............................................ 41
I
IN
Trim (CS1 Trim).................................................................... 41
I
OUT
Trim (CS2 Trim) ................................................................. 41
V
OUT
Trim (VS Trim) ................................................................. 41
V
IN
Trim (VF Gain Trim) .......................................................... 42
RTD and OTP Trim ................................................................... 42
Applications Configurations ......................................................... 43
Layout Guidelines ........................................................................... 45
CS1 Pin ........................................................................................ 45
CS2+ and CS2− Pins .................................................................. 45
VS+ and VS− Pins ...................................................................... 45
OUTA to OUTD, SR1 AND SR2 PWM Outputs .................. 45
VDD Pin ...................................................................................... 45
VCORE Pin ................................................................................. 45
RES Pin ........................................................................................ 45
SDA and SCL Pins ...................................................................... 45
Exposed Pad ................................................................................ 45
RTD Pin ....................................................................................... 45
AGND Pin ................................................................................... 45
PMBus/I
2
C Communication ......................................................... 46
PMBus Features .......................................................................... 46
Overview ..................................................................................... 46
PMBus/I
2
C Address ................................................................... 46
Data Transfer............................................................................... 46
General Call Support ................................................................. 48
10-Bit Addressing ....................................................................... 48
Fast Mode .................................................................................... 48
Fault Conditions ......................................................................... 48
Timeout Conditions ................................................................... 48
Data Transmission Faults .......................................................... 48
Data Content Faults ................................................................... 49
EEPROM ......................................................................................... 50
Rev. B | Page 2 of 113
Data Sheet
EEPROM Features ......................................................................50
EEPROM Overview ....................................................................50
Page Erase Operation .................................................................50
Read Operation (Byte Read and Block Read) .........................50
Write Operation (Byte Write and Block Write) ......................51
EEPROM Password.....................................................................51
Downloading EEPROM Settings to Internal Registers..........52
Saving Register Settings to the EEPROM ................................52
EEPROM CRC Checksum .........................................................52
GUI Software ...................................................................................53
PMBus Command Set ....................................................................54
Extended Command List: Manufacturer Specific ......................57
PMBus Command Descriptions ...................................................60
Basic PMBus Commands ...........................................................60
Manufacturer Specific Extended Commands Descriptions ......80
Flag Configuration Registers .....................................................80
Soft Start and Software Reset Registers ....................................82
ADP1052
Blanking and PGOOD Setting Registers ................................. 83
Switching Frequency and Synchronization Registers ............ 86
Current Sense and Limit Setting Registers .............................. 87
Voltage Sense and Limit Setting Registers ............................... 92
Temperature Sense and Protection Setting Registers ............. 93
Digital Compensator and Modulation Setting Registers....... 94
PWM Outputs Timing Registers .............................................. 97
Volt-Second Balance Control Registers ................................... 99
Duty Cycle Reading Setting Registers ....................................101
Adaptive Dead Time Compensation Registers .....................101
Other Register Settings.............................................................104
Manufacturer Specific Fault Flag Registers ...........................108
Manufacturer Specific Value Reading Registers ...................111
Outline Dimensions ......................................................................113
Ordering Guide .........................................................................113
REVISION HISTORY
6/2017—Rev. A to Rev. B
Updated Outline Dimensions ......................................................113
Changes to Ordering Guide .........................................................113
4/2015—Rev. 0 to Rev. A
Changes to Ordering Guide .........................................................113
1/2015—Revision 0: Initial Version
Rev. B | Page 3 of 113
ADP1052
SPECIFICATIONS
V
DD
= 3.0 V to 3.6 V, T
J
= −40°C to +125°C, unless otherwise noted; FSR = full-scale range.
Table 1.
Parameter
SUPPLY
Supply Voltage
Supply Current
Symbol
V
DD
I
DD
Min
3.0
Typ
3.3
33
I
DD
+ 6
50
Max
3.6
Unit
V
mA
mA
μA
Data Sheet
Test Conditions/Comments
2.2 μF capacitor connected to AGND
Normal operation; PWM pins unloaded
During EEPROM programming
Shutdown; V
DD
below undervoltage
lockout (UVLO)
V
DD
rising
V
DD
falling
100
POWER-ON RESET
Power-On Reset
UVLO Threshold
UVLO Hysteresis
Overvoltage Lockout (OVLO) Threshold
OVLO Debounce
VCORE PIN
Output Voltage
OSCILLATOR AND PLL
PLL Frequency
Digital PWM Resolution
OUTA, OUTB, OUTC, OUTD, SR1, SR2 PINS
Output Voltage
Low
High
Rise Time
Fall Time
Output Current
Source
Sink
Synchronization Signal Output (SYNO)
Positive Pulse Width
VS+, VS− VOLTAGE SENSE PINS
Input Voltage Range
Leakage Current
Voltage Sense (VS) Accurate Analog-to-
Digital Converter (ADC)
Valid Input Voltage Range
ADC Clock Frequency
Register Update Rate
Measurement
Resolution
Accuracy
UVLO
OVLO
2.75
3.7
2.85
35
3.9
2
500
2.6
200
625
3.0
2.97
4.1
V
V
mV
V
μs
μs
V
MHz
ps
VDD_OV flag debounce set to 2 μs
VDD_OV flag debounce set to 500 μs
330 nF capacitor connected to AGND
RES input = 10 kΩ (±0.1%)
V
CORE
2.45
190
2.75
210
V
OL
V
OH
t
R
t
F
I
OL
I
OH
0.4
V
DD
− 0.4
3.5
1.5
−10
600
640
10
680
V
V
ns
ns
mA
mA
ns
I
OH
= 10 mA
I
OL
= −10 mA
C
LOAD
= 50 pF
C
LOAD
= 50 pF
OUTC or OUTD programmed as SYNO
V
IN
0
1
1.6
1.0
V
μA
Differential voltage from VS+ to VS−
0
1.56
10
12
−5
−80
−2
−32
−1.0
−16
1.6
V
MHz
ms
Bits
Temperature Coefficient
Voltage Differential from VS− to AGND
−200
Rev. B | Page 4 of 113
+5
+80
+2
+32
+1.0
+16
70
+200
% FSR
mV
% FSR
mV
% FSR
mV
ppm/°C
mV
Factory trimmed at 1.0 V
0% to 100% of input voltage range
10% to 90% of input voltage range
900 mV to 1.1 V
Data Sheet
Parameter
VS High Speed ADC
Equivalent Sampling Frequency
Equivalent Resolution
Dynamic Range
VS Undervoltage Protection (UVP) Digital
Comparator
Threshold Accuracy
Comparator Update Speed
OVP PIN
Leakage Current
Overvoltage Protection (OVP) Comparator
Voltage Range
Threshold Accuracy
Propagation Delay (Latency)
VF VOLTAGE SENSE PIN
Input Voltage Range
Leakage Current
General ADC
Valid Input Voltage Range
ADC Clock Frequency
Register Update Rate
Measurement
Resolution
Accuracy
Symbol
f
SAMP
Min
Typ
f
SW
6
±25
Max
Unit
kHz
Bits
mV
ADP1052
Test Conditions/Comments
f
SW
= 390.5 kHz
Regulation voltage = 0 mV to 1.6 V
Triggers VOUT_UV_FAULT flag
10% to 90% of input voltage range
Triggers VOUT_OV_FAULT flag
−2
82
+2
% FSR
µs
µA
V
%
ns
V
µA
V
MHz
ms
Bits
% FSR
mV
% FSR
mV
1.0
0.75
−1.6
1.5
+1.6
85
1.6
1.0
1.6
1.56
1.31
11
−2
−32
−5
−80
+2
+32
+5
+80
1
61
1
Differential voltage from OVP to VS−
0.75 V to 1.5 V voltage range
Debounce time not included
Voltage from VF to AGND
V
IN
0
0
10% to 90% of input voltage range
0% to 100% of input voltage range
Triggers VIN_LOW or VIN_UV_FAULT flag
Based on VF general ADC parameter
values
Feedforward Voltage (VF) UVP Digital
Comparator
Threshold Accuracy
Comparator Update Speed
Feedforward ADC
Input Voltage Range
Resolution
Sampling Period
CS1 CURRENT SENSE PIN
Input Voltage Range
Source Current
CS1 ADC
Valid Input Voltage Range
ADC Clock Frequency
Register Update Rate
Measurement
Resolution
Accuracy
1.31
V
IN
0.5
1
11
10
1
1.6
ms
V
Bits
μs
V
µA
V
MHz
ms
Bits
% FSR
mV
% FSR
mV
V
IN
0
−1.2
0
1.6
−0.35
1.6
Voltage from CS1 to AGND
1.56
10
12
−2
−32
−5
−80
+2
+32
+5
+80
10% to 90% of input voltage range
0% to 100% of input voltage range
Triggers internal CS1_OCP flag
CS1 Overcurrent Protection (OCP)
Comparator
Reference Accuracy
Propagation Delay (Latency)
1.185
0.235
1.2
0.25
65
1.215
0.265
105
V
V
ns
When set to 1.2 V
When set to 0.25 V
Debounce/blanking time not included
Rev. B | Page 5 of 113
MCU
京公网安备 11010802033920号
EEWORLD
