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STK11C88-3S35

Description
32K x 8 nvSRAM 3.3V QuantumTrap⑩ CMOS Nonvolatile Static RAM
Categorystorage    storage   
File Size99KB,10 Pages
ManufacturerSimtek
Websitehttp://www.simtek.com
Download Datasheet Parametric View All

STK11C88-3S35 Overview

32K x 8 nvSRAM 3.3V QuantumTrap⑩ CMOS Nonvolatile Static RAM

STK11C88-3S35 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSimtek
package instructionSOP,
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time35 ns
JESD-30 codeR-PDSO-G28
JESD-609 codee0
length18.085 mm
memory density262144 bi
Memory IC TypeNON-VOLATILE SRAM
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum seat height2.54 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width8.765 mm
STK11C88-3
32K x 8 nvSRAM
3.3V
QuantumTrap™
CMOS
Nonvolatile Static RAM
Obsolete - Not Recommend for new Deisgns
FEATURES
• 35, 45ns and 55ns Access Times
STORE
to Nonvolatile Elements Initiated by
Software
RECALL
to SRAM Initiated by Software or
Power Restore
• 10 mA Typical Icc at 200 nsec Cycle Time
• Unlimited READ, WRITE and
RECALL
Cycles
• 1,000,000
STORE
Cycles to Nonvolatile Ele-
ments
• 100-Year Data Retention in Nonvolatile Ele-
ments
• Single 3.3V+ 0.3V Operation
• Commercial and Industrial Temperatures
• 28-Pin DIP and SOIC Packages
DESCRIPTION
The Simtek STK11C88-3 is a fast static
RAM
with a
nonvolatile element incorporated in each static
memory cell. The
SRAM
can be read and written an
unlimited number of times, while independent non-
volatile data resides in Nonvolatile Elements. Data
transfers from the
SRAM
to the Nonvolatile Elements
(the
STORE
operation), or from Nonvolatile Elements
to
SRAM
(the
RECALL
operation) are initiated using a
software sequence. Data transfers from the Nonvol-
atile Elements to the
SRAM
(the
RECALL
operation)
also occur upon restoration of power.
BLOCK DIAGRAM
QUANTUM TRAP
512 x 512
PIN CONFIGURATIONS
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
5
A
6
A
7
A
8
A
9
A
11
A
12
A
13
A
14
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
STORE
STATIC RAM
ARRAY
512 x 512
RECALL
STORE/
RECALL
CONTROL
SOFTWARE
DETECT
INPUT BUFFERS
COLUMN I/O
COLUMN DEC
A
0
- A
13
V
CC
W
A
13
A
8
A
9
A
11
G
A
10
E
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
ROW DECODER
28 - 300 PDIP
28 - 600 PDIP
28 - 300 SOIC
28 - 350 SOIC
PIN NAMES
A
0
- A
14
W
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Power (+ 3.3V)
Ground
A
0
A
1
A
2
A
3
A
4
A
10
DQ
0
- DQ
7
G
E
W
E
G
V
CC
V
SS
March 2006
1
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