ADC0808S125HW/C1,1 datasheet, PDF

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ADC0808S125HW/C1,1: DescriptionADC 8BIT SGL 125MHZ 48HTQFP; Categorysemiconductor Analog mixed-signal IC; File Size122KB，23 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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ADC0808S125HW/C1,1 Overview

ADC 8BIT SGL 125MHZ 48HTQFP

ADC0808S125HW/C1,1 Parametric

Parameter Name	Attribute value
Number of digits	8
Sample rate (per second)	125M
Number of inputs	1
input type	difference
Data interface	in parallel
Configuration	S/H-ADC
Radio - S/H:ADC	1：1
Number of A/D converters	1
Architecture	-
Reference type	outside, inside
Voltage - Power, Analog	3 V ~ 3.6 V
Voltage - Power, Digital	1.65 V ~ 1.95 V
characteristic	-
Operating temperature	-40°C ~ 85°C
Package/casing	48-TQFP Exposed Pad
Supplier device packaging	48-HTQFP（7x7）

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ADC0808S125/250

Single 8-bit ADC, up to 125 MHz or 250 MHz

Rev. 03 — 24 February 2009

Product data sheet

1. General description

The ADC0808S is a differential, high-speed, 8-bit Analog-to-Digital Converter (ADC)

optimized for telecommunication transmission control systems and tape drive

applications. It allows signal sampling frequencies up to 250 MHz.

The ADC0808S clock inputs are selectable between 1.8 V Complementary Metal Oxide

Semiconductor (CMOS) or Low-Voltage Differential Signals (LVDS). The data output

signal levels are 1.8 V CMOS.

All static digital inputs (CLKSEL, CCSSEL, CE_N, OTC, DEL0 and DEL1) are 1.8 V

CMOS compatible.

The ADC0808S offers the most ﬂexible acquisition control system possible due to its

programmable Complete Conversion Signal (CCS) which allows the delay time of the

acquisition clock and acquisition clock frequency to be adjusted.

The ADC0808S is supplied in an HTQFP48 package.

2. Features

8-bit resolution

High-speed sampling rate up to 250 MHz

Maximum analog input frequency up to 560 MHz

Programmable acquisition output clock (complete conversion signal)

Differential analog input

Integrated voltage regulator or external control for analog input full-scale

Integrated voltage regulator for input common-mode reference

Selectable 1.8 V CMOS or LVDS clock input

1.8 V CMOS digital outputs

1.8 V CMOS compatible static digital inputs

Binary or 2’s complement CMOS outputs

Only 2 clock cycles latency

Industrial temperature range from

−40 °C

to +85

°C

HTQFP48 package

3. Applications

2.5G and 3G cellular base infrastructure radio transceivers

Wireless access systems

Fixed telecommunications

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