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LTC2158IUP-12#PBF

Description
IC ADC 12BIT DUAL 310MSPS
Categorysemiconductor    Analog mixed-signal IC   
File Size1MB,28 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance
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LTC2158IUP-12#PBF Overview

IC ADC 12BIT DUAL 310MSPS

LTC2158IUP-12#PBF Parametric

Parameter NameAttribute value
Number of digits12
Sample rate (per second)310M
Number of inputs2
input typedifference
Data interfaceLVDS - Parallel
ConfigurationS/H-ADC
Radio - S/H:ADC1:1
Number of A/D converters2
Architecturepipeline
Reference typeoutside, inside
Voltage - Power, Analog1.74 V ~ 1.9 V
Voltage - Power, Digital1.74 V ~ 1.9 V
characteristicSynchronous sampling
Operating temperature-40°C ~ 85°C
Package/casing64-WFQFN Exposed Pad
Supplier device packaging64-QFN(9x9)
LTC2158-12
Dual 12-Bit 310Msps ADC
FEATURES
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DESCRIPTION
The
LTC
®
2158-12
is a 2-channel simultaneous sampling
310Msps 12-bit A/D converter designed for digitizing high
frequency, wide dynamic range signals. It is perfect for
demanding communications applications with AC per-
formance that includes 67.6dB SNR and 88dB spurious
free dynamic range (SFDR). The 1.25GHz input bandwidth
allows the ADC to undersample high frequencies with
good performance. The latency is only six clock cycles.
DC specs include ±0.6LSB INL (typ), ±0.1LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 0.6LSB
RMS
.
The digital outputs are double data rate (DDR) LVDS.
The ENC
+
and ENC
inputs can be driven differentially with
a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional
clock duty cycle stabilizer allows high performance at full
speed for a wide range of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
67.6dBFS SNR
88dB SFDR
Low Power: 688mW Total
Single 1.8V Supply
DDR LVDS Outputs
1.32V
P-P
Input Range
1.25GHz Full Power Bandwidth S/H
Optional Clock Duty Cycle Stabilizer
Low Power Sleep and Nap Modes
Serial SPI Port for Configuration
Pin-Compatible 14-Bit Versions
64-Lead (9mm × 9mm) QFN Package
APPLICATIONS
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Communications
Cellular Basestations
Software Defined Radios
Medical Imaging
High Definition Video
Testing and Measurement Instruments
TYPICAL APPLICATION
V
DD
CHANNEL A
ANALOG
INPUT
12-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
OV
DD
DA10_11
DA0_1
LTC2158-12 32K Point 2-Tone FFT,
f
IN
= 71MHz and 69MHz, 310Msps
0
DDR
LVDS
AMPLITUDE (dBFS)
DDR
LVDS
–20
–40
–60
–80
S/H
CLOCK
CLOCK/DUTY
CYCLE
CONTROL
OGND
CHANNEL B
OV
DD
DB10_11
DB0_1
215812 TA01
–100
ANALOG
INPUT
12-BIT
PIPELINED
ADC CORE
GND
OGND
CORRECTION
LOGIC
OUTPUT
DRIVERS
–120
S/H
0
20
40
60 80 100 120 140
FREQUENCY (MHz)
215812 TA10b
215812fa
For more information
www.linear.com/LTC2158-12
1

LTC2158IUP-12#PBF Related Products

LTC2158IUP-12#PBF LTC2158IUP-12#TRPBF LTC2158CUP-12#PBF LTC2158CUP-12#TRPBF
Description IC ADC 12BIT DUAL 310MSPS IC ADC 12BIT DUAL 310MSPS IC ADC 12BIT DUAL 310MSPS IC ADC 12BIT DUAL 310MSPS
Number of digits 12 12 12 12
Sample rate (per second) 310M 310M 310M 310M
Number of inputs 2 2 2 2
input type difference difference difference difference
Data interface LVDS - Parallel LVDS - Parallel LVDS - Parallel LVDS - Parallel
Configuration S/H-ADC S/H-ADC S/H-ADC S/H-ADC
Radio - S/H:ADC 1:1 1:1 1:1 1:1
Number of A/D converters 2 2 2 2
Architecture pipeline pipeline pipeline pipeline
Reference type outside, inside outside, inside outside, inside outside, inside
Voltage - Power, Analog 1.74 V ~ 1.9 V 1.74 V ~ 1.9 V 1.74 V ~ 1.9 V 1.74 V ~ 1.9 V
Voltage - Power, Digital 1.74 V ~ 1.9 V 1.74 V ~ 1.9 V 1.74 V ~ 1.9 V 1.74 V ~ 1.9 V
characteristic Synchronous sampling Synchronous sampling Synchronous sampling Synchronous sampling
Operating temperature -40°C ~ 85°C -40°C ~ 85°C 0°C ~ 70°C 0°C ~ 70°C
Package/casing 64-WFQFN Exposed Pad 64-WFQFN Exposed Pad 64-WFQFN Exposed Pad 64-WFQFN Exposed Pad
Supplier device packaging 64-QFN(9x9) 64-QFN(9x9) 64-QFN(9x9) 64-QFN(9x9)

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