CY7C1327B-100BGIT datasheet, PDF

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CY7C1327B-100BGIT: DescriptionCache SRAM, 256KX18, 5.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119; Categorystorage storage; File Size364KB，17 Pages; ManufacturerCypress Semiconductor

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CY7C1327B-100BGIT Overview

Cache SRAM, 256KX18, 5.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119

CY7C1327B-100BGIT Parametric

Parameter Name	Attribute value
Parts packaging code	BGA
package instruction	BGA,
Contacts	119
Reach Compliance Code	unknow
ECCN code	3A991.B.2.A
Maximum access time	5.5 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B119
length	22 mm
memory density	4718592 bi
Memory IC Type	CACHE SRAM
memory width	18
Number of functions	1
Number of terminals	119
word count	262144 words
character code	256000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX18
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	2.4 mm
Maximum supply voltage (Vsup)	3.63 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	14 mm
Base Number Matches	1

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327

CY7C1327B

256K x 18 Synchronous-Pipelined Cache RAM

Features

• Supports 100-MHz bus for Pentium and PowerPC™

operations with zero wait states

• Fully registered inputs and outputs for pipelined

operation

• 256K by 18 common I/O architecture

• 3.3V core power supply

• 2.5V / 3.3V I/O operation

• Fast clock-to-output times

— 3.5 ns (for 166-MHz device)

— 4.0 ns (for 133-MHz device)

•

— 5.5 ns (for 100-MHz device)

User-selectable burst counter supporting Intel

Pentium interleaved or linear burst sequences

Separate processor and controller address strobes

Synchronous self-timed writes

Asynchronous Output Enable

JEDEC-standard 100 TQFP pinout

“ZZ” Sleep Mode option and Stop Clock option

The CY7C1327B I/O pins can operate at either the 2.5V or the

3.3V level. The I/O pins are 3.3V tolerant when V

DDQ

=2.5V.

All synchronous inputs pass through input registers controlled

by the rising edge of the clock. All data outputs pass through

output registers controlled by the rising edge of the clock. Max-

imum access delay from the clock rise is 3.5 ns (166-MHz

device).

The CY7C1327B supports either the interleaved burst se-

quence used by the Intel Pentium processor or a linear burst

sequence used by processors such as the PowerPC. The

burst sequence is selected through the MODE pin. Accesses

can be initiated by asserting either the Processor Address

Strobe (ADSP) or the Controller Address Strobe (ADSC) at

clock rise. Address advancement through the burst sequence

is controlled by the ADV input. A 2-bit on-chip wraparound

burst counter captures the first address in a burst sequence

and automatically increments the address for the rest of the

burst access.

Byte write operations are qualified with the four Byte Write

Select (BW

[1:0]

) inputs. A Global Write Enable (GW) overrides

all byte write inputs and writes data to all four bytes. All writes

are conducted with on-chip synchronous self-timed write cir-

cuitry.

Three synchronous Chip Selects (CE

, CE

) and an

asynchronous Output Enable (OE) provide for easy bank se-

lection and output three-state control. In order to provide prop-

er data during depth expansion, OE is masked during the first

clock of a read cycle when emerging from a deselected state.

Functional Description

The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined

cache SRAM designed to support zero wait state secondary

cache with minimal glue logic.

Logic Block Diagram

CLK

ADV

ADSC

ADSP

[17:0]

BWE

MODE

[1;0]

) 2

BURST Q

CE COUNTER

CLR

ADDRESS

CE REGISTER

D DQ[15:8], DP[1] Q

BYTEWRITE

REGISTERS

D DQ[7:0], DP[0] Q

BYTEWRITE

REGISTERS

256KX18

MEMORY

ARRAY

ENABLE CE

CE REGISTER

D ENABLE DELAY Q

SLEEP

CONTROL

OUTPUT

REGISTERS

CLK

INPUT

REGISTERS

CLK

[15:0]

[1:0]

Cypress Semiconductor Corporation

Document #: 38-05140 Rev. *B

•

3901 North First Street

•

San Jose

CA 95134

•

408-943-2600

Revised January 18, 2003

CY7C1327B-100BGIT Related Products

	CY7C1327B-100BGIT	CY7C1327B-100AIT	CY7C1327B-100BGCT	CY7C1327B-100ACT	CY7C1327B-166BGCT	CY7C1327B-133AIT	0402WGF2432T5E	CY7C1327B-133BGCT	448UA3102BDN	CY7C1327B-133ACT
Description	Cache SRAM, 256KX18, 5.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119	Cache SRAM, 256KX18, 5.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 5.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119	Cache SRAM, 256KX18, 5.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 3.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119	Cache SRAM, 256KX18, 4ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Fixed Resistor, Metal Glaze/thick Film, 0.0625W, 24300ohm, 50V, 1% +/-Tol, -100,100ppm/Cel, 0402,	Cache SRAM, 256KX18, 4ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119	Resistor, Carbon Composition, 1000ohm, 300V, 20% +/-Tol,	Cache SRAM, 256KX18, 4ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Reach Compliance Code	unknow	unknow	unknown	unknown	unknown	unknown	compliant	unknown	unknown	unknown
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	EAR99	3A991.B.2.A	EAR99	3A991.B.2.A
Package form	GRID ARRAY	FLATPACK, LOW PROFILE	GRID ARRAY	FLATPACK, LOW PROFILE	GRID ARRAY	FLATPACK, LOW PROFILE	SMT	GRID ARRAY	PCB Mount	FLATPACK, LOW PROFILE
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	METAL GLAZE/THICK FILM	CMOS	CARBON COMPOSITION	CMOS
Parts packaging code	BGA	QFP	BGA	QFP	BGA	QFP	-	BGA	-	QFP
package instruction	BGA,	LQFP,	BGA,	LQFP,	BGA,	LQFP,	-	BGA,	-	LQFP,
Contacts	119	100	119	100	119	100	-	119	-	100
Maximum access time	5.5 ns	5.5 ns	5.5 ns	5.5 ns	3.5 ns	4 ns	-	4 ns	-	4 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	-	PIPELINED ARCHITECTURE	-	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B119	R-PQFP-G100	R-PBGA-B119	R-PQFP-G100	R-PBGA-B119	R-PQFP-G100	-	R-PBGA-B119	-	R-PQFP-G100
length	22 mm	20 mm	22 mm	20 mm	22 mm	20 mm	-	22 mm	-	20 mm
memory density	4718592 bi	4718592 bi	4718592 bit	4718592 bit	4718592 bit	4718592 bit	-	4718592 bit	-	4718592 bit
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	-	CACHE SRAM	-	CACHE SRAM
memory width	18	18	18	18	18	18	-	18	-	18
Number of functions	1	1	1	1	1	1	-	1	-	1
Number of terminals	119	100	119	100	119	100	2	119	-	100
word count	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words	-	262144 words	-	262144 words
character code	256000	256000	256000	256000	256000	256000	-	256000	-	256000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	-	SYNCHRONOUS	-	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	70 °C	70 °C	70 °C	85 °C	155 °C	70 °C	-	70 °C
organize	256KX18	256KX18	256KX18	256KX18	256KX18	256KX18	-	256KX18	-	256KX18
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	BGA	LQFP	BGA	LQFP	BGA	LQFP	-	BGA	-	LQFP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	-	RECTANGULAR
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	-	PARALLEL	-	PARALLEL
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-	Not Qualified	-	Not Qualified
Maximum seat height	2.4 mm	1.6 mm	2.4 mm	1.6 mm	2.4 mm	1.6 mm	-	2.4 mm	-	1.6 mm
Maximum supply voltage (Vsup)	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	-	3.63 V	-	3.63 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	-	3.135 V	-	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	-	3.3 V	-	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	-	YES	-	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	-	COMMERCIAL	-	COMMERCIAL
Terminal form	BALL	GULL WING	BALL	GULL WING	BALL	GULL WING	-	BALL	-	GULL WING
Terminal pitch	1.27 mm	0.65 mm	1.27 mm	0.65 mm	1.27 mm	0.65 mm	-	1.27 mm	-	0.65 mm
Terminal location	BOTTOM	QUAD	BOTTOM	QUAD	BOTTOM	QUAD	-	BOTTOM	-	QUAD
width	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	-	14 mm	-	14 mm
Base Number Matches	1	1	1	1	1	1	-	-	-	-

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