BUK9606-75B
N-channel TrenchMOS logic level FET
Rev. 4 — 20 July 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V, 24 V and 42 V loads
Automotive systems
General purpose power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
drain-source on-state
resistance
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
V
GS
= 5 V; T
mb
= 25 °C;
see
Figure 1;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C;
see
Figure 11;
see
Figure 12
[1]
Min
-
-
-
-
-
Typ
-
-
-
4.7
5.2
Max
75
75
300
5.5
6.1
Unit
V
A
W
mΩ
mΩ
Static characteristics
Nexperia
BUK9606-75B
N-channel TrenchMOS logic level FET
Table 1.
Symbol
E
DS(AL)S
Quick reference data
…continued
Parameter
non-repetitive
drain-source
avalanche energy
gate-drain charge
Conditions
I
D
= 75 A; V
sup
≤
75 V;
R
GS
= 50
Ω;
V
GS
= 5 V;
T
j(init)
= 25 °C; unclamped
V
GS
= 5 V; I
D
= 25 A;
V
DS
= 60 V; T
j
= 25 °C;
see
Figure 13
Min
-
Typ
-
Max
852
Unit
mJ
Avalanche ruggedness
Dynamic characteristics
Q
GD
-
37
-
nC
[1]
Continuous current is limited by package.
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base;
connected to drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT404 (D2PAK)
[1]
It is not possible to make a connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9606-75B
D2PAK
Description
plastic single-ended surface-mounted package (D2PAK);
3 leads (one lead cropped)
Version
SOT404
Type number
BUK9606-75B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 4 — 20 July 2011
2 of 13
Nexperia
BUK9606-75B
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 100 °C; V
GS
= 5 V; see
Figure 1
T
mb
= 25 °C; V
GS
= 5 V; see
Figure 1;
see
Figure 3
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
pulsed; t
p
≤
10 µs; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
75 V; R
GS
= 50
Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
[2]
[1]
[1]
[2]
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-15
-
-
-
-
-
-55
-55
-
-
-
-
Max
75
75
15
75
153
75
612
300
175
175
153
75
612
852
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
mJ
T
mb
= 25 °C; pulsed; t
p
≤
10 µs;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Source-drain diode
Avalanche ruggedness
[1]
[2]
Continuous current is limited by package.
Current is limited by power dissipation chip rating.
200
I
D
(A)
150
03nh76
120
P
der
(%)
80
03na19
100
Capped at 75 A due to package
50
40
0
0
25
50
75
100
125
150
175
200
T
mb
(°C)
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
©
BUK9606-75B
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 4 — 20 July 2011
3 of 13
Nexperia
BUK9606-75B
N-channel TrenchMOS logic level FET
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/ I
D
t
p
=10
µ
s
100
µ
s
03ng87
10
DC
1
1 ms
10 ms
100 ms
10
-1
10
-1
1
10
10
2
V
DS
(V)
10
3
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to mounting base
thermal resistance from
junction to ambient
Conditions
see
Figure 4
mounted on a printed circuit
board; minimum footprint
Min
-
-
Typ
-
50
Max
0.5
-
Unit
K/W
K/W
1
Z
th(j-mb)
(K/W)
10
−1
03ng88
δ
= 0.5
0.2
0.1
0.05
10
−2
0.02
P
δ
=
t
p
T
single shot
t
p
t
T
10
−3
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9606-75B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 4 — 20 July 2011
4 of 13
Nexperia
BUK9606-75B
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
V
GS(th)
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 0.25 mA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 0.25 mA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
see
Figure 10
I
DSS
I
GSS
R
DSon
drain leakage current
gate leakage current
drain-source on-state
resistance
V
DS
= 75 V; V
GS
= 0 V; T
j
= 175 °C
V
DS
= 75 V; V
GS
= 0 V; T
j
= 25 °C
V
GS
= 15 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -15 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 4.5 V; I
D
= 25 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A; T
j
= 175 °C;
see
Figure 11;
see
Figure 12
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A; T
j
= 25 °C;
see
Figure 11;
see
Figure 12
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
L
D
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain
inductance
from drain lead 6 mm from package to
centre of die; T
j
= 25 °C
from upper edge of drain mounting base
to centre of die; T
j
= 25 °C
L
S
internal source
inductance
from source lead to source bond pad;
T
j
= 25 °C
V
DS
= 30 V; R
L
= 1.2
Ω;
V
GS
= 5 V;
R
G(ext)
= 10
Ω;
T
j
= 25 °C
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 14
I
D
= 25 A; V
DS
= 60 V; V
GS
= 5 V;
T
j
= 25 °C; see
Figure 13
-
-
-
-
-
-
-
-
-
-
-
-
-
95
17
37
8770
842
336
68
144
273
116
4.5
2.5
7.5
-
-
-
1010
460
-
-
-
-
-
-
-
nC
nC
nC
pF
pF
ns
ns
ns
ns
nH
nH
nH
Min
75
70
1.1
0.5
-
-
-
-
-
-
-
-
-
Typ
-
-
1.5
-
-
-
0.02
2
2
-
-
4.7
5.2
Max
-
-
2
-
2.3
500
1
100
100
6.6
12.8
5.5
6.1
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
mΩ
mΩ
Static characteristics
11693 pF
BUK9606-75B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 4 — 20 July 2011
5 of 13
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