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SY58606UMG-TR

Description
Clock Fanout Buffer 2-OUT 1-IN 1:2 16-Pin QFN EP T/R
File Size2MB,24 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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SY58606UMG-TR Overview

Clock Fanout Buffer 2-OUT 1-IN 1:2 16-Pin QFN EP T/R

SY58606UMG-TR Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)EAR99
Part StatusActive
HTS8542.39.00.01
TypeFanout Buffer
Fanout1:2
Number of Outputs per Chip2
Maximum Input Frequency (MHz)3000(Typ)
Maximum Propagation Delay Time @ Maximum CL (ns)0.4@2.375V to 3.63V
Absolute Propagation Delay Time (ns)0.4
Maximum Duty Cycle53%
Input Logic LevelCML|LVDS|LVPECL
Output Logic LevelCML
Minimum Operating Supply Voltage (V)2.375
Typical Operating Supply Voltage (V)2.5|3.3
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
Supplier Temperature GradeIndustrial
PackagingTape and Reel
Pin Count16
Standard Package NameQFN
Supplier PackageQFN EP
MountingSurface Mount
Package Height0.85(Max)
Package Length3
Package Width3
PCB changed16
Lead ShapeNo Lead
SY58606U
4.25 Gbps Precision, 1:2 CML Fanout Buffer with Internal Termination and
Fail Safe Input
Features
• Precision 1:2, 400 mV CML Fanout Buffer
• Guaranteed AC Performance over Temperature
and Voltage:
- DC-to >4.25 Gbps Throughput
- <320 ps Propagation Delay (IN-to-Q)
- <15 ps Within-Device Skew
- <85 ps Rise/Fall Times
• Fail Safe Input
- Prevents Outputs From Oscillating When
Input is Invalid
• Ultra-Low Jitter Design
- 100 fs
RMS
Typical Additive Jitter
• High-Speed CML Outputs
• 2.5V ±5% or 3.3V ±10% Power Supply Operation
• Industrial Temperature Range: –40°C to +85°C
• Available In 16-lead (3 mm x 3 mm) QFN
Package
General Description
The SY58606U is a 2.5/3.3V, high-speed, fully
differential 1:2 CML fanout buffer optimized to provide
two identical output copies with less than 15 ps of skew
and 100 fs
RMS
of typical additive phase jitter. The
SY58606U can process clock signals as fast as 3 GHz
or data patterns up to 4.25 Gbps.
The differential input includes Microchip’s unique,
3-lead input termination architecture that interfaces to
LVPECL, LVDS, or CML differential signals, (AC- or
DC-coupled) as small as 100 mV (200 mV
PP
) without
any level-shifting or termination resistor networks in the
signal path. For AC-coupled input interface
applications, an integrated voltage reference (V
REF-AC
)
is provided to bias the V
T
pin. The outputs are 400 mV
CML, with extremely fast rise/fall times guaranteed to
be less than 85 ps.
The SY58606U operates from a 2.5V ±5% supply or
3.3V ±10% supply and is guaranteed over the full
industrial temperature range (–40°C to +85°C). For
applications that require LVPECL or LVDS outputs,
consider Microchip’s SY58607U and SY58608U, 1:2
fanout buffers with 800 mV and 325 mV output swings
respectively. The SY58606U is part of Microchip’s
high-speed, Precision Edge
®
product line.
Applications
Data Distribution: OC-48, OC-48+FEC, XAUI
SONET Clock and Data Distribution
Fibre Channel Clock and Data Distribution
Gigabit Ethernet Clock And Data Distribution
Markets
Storage
ATE
Test and Measurement
Enterprise Networking Equipment
High-End Servers
Access
Metro Area Network Equipment
Package Type
SY58606U
3 mm x 3 mm QFN-16 (M)
(Top View)
GND
GND
14
VCC
16
15
13
12
11
10
9
VCC
IN
VT
VREF-AC
/IN
1
2
3
4
5
6
7
8
Q0
/Q0
Q1
/Q1
GND
United States Patent No. RE44,134
2019 Microchip Technology Inc.
GND
DS20006199A-page 1
VCC
VCC

SY58606UMG-TR Related Products

SY58606UMG-TR SY58606UMG
Description Clock Fanout Buffer 2-OUT 1-IN 1:2 16-Pin QFN EP T/R Clock Fanout Buffer 2-OUT 1-IN 1:2 16-Pin QFN EP Tube
EU restricts the use of certain hazardous substances Compliant Compliant
ECCN (US) EAR99 5A991.c
Part Status Active Active
HTS 8542.39.00.01 8542.39.00.01
Type Fanout Buffer Fanout Buffer
Fanout 1:2 1:2
Number of Outputs per Chip 2 2
Maximum Input Frequency (MHz) 3000(Typ) 3000(Typ)
Maximum Propagation Delay Time @ Maximum CL (ns) 0.4@2.375V to 3.63V 0.4@2.375V to 3.63V
Absolute Propagation Delay Time (ns) 0.4 0.4
Maximum Duty Cycle 53% 53%
Input Logic Level CML|LVDS|LVPECL LVPECL|LVDS|CML
Output Logic Level CML CML
Minimum Operating Supply Voltage (V) 2.375 2.375
Typical Operating Supply Voltage (V) 2.5|3.3 3.3|2.5
Maximum Operating Supply Voltage (V) 3.6 3.6
Minimum Operating Temperature (°C) -40 -40
Maximum Operating Temperature (°C) 85 85
Supplier Temperature Grade Industrial Industrial
Packaging Tape and Reel Tube
Pin Count 16 16
Standard Package Name QFN QFN
Supplier Package QFN EP QFN EP
Mounting Surface Mount Surface Mount
Package Height 0.85(Max) 0.85(Max)
Package Length 3 3
Package Width 3 3
PCB changed 16 16
Lead Shape No Lead No Lead
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