A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD810018/ALD910018
e
TM
EPAD
E
N
®
AB
LE
D
QUAD/DUAL SUPERCAPACITOR AUTO BALANCING (SAB
™
) MOSFET ARRAY
GENERAL DESCRIPTION
The ALD810018/ALD910018 are members of the ALD8100xx
(quad) and ALD9100xx (dual) family of Supercapacitor Auto Bal-
ancing MOSFETs, or SAB™ MOSFETs. SAB MOSFETs are built
with production proven EPAD
®
technology and are designed to ad-
dress voltage and leakage-current balancing of supercapacitors
connected in series. Supercapacitors, also known as ultracapacitors
or supercaps, connected in series can be leakage-current balanced
by using a combination of one or more devices connected across
each supercapacitor stack to prevent over-voltages.
The ALD810018 offers a set of unique, precise operating voltage
and current characteristics for each of four SAB MOSFET devices,
as shown in its Operating Electrical Characteristics table. It can be
used to balance up to four supercapacitors connected in series.
The ALD910018 has its own set of unique precision Operating Elec-
trical Characteristics for each of its two SAB MOSFET devices,
suitable for up to two series-connected supercapacitors.
Each SAB MOSFET features a precision gate threshold voltage in
the V
t
mode, which is 1.80V when the gate-drain source terminals
(V
GS
= V
DS
) are connected together at a drain-source current of
I
DS(ON)
= 1µA. In this mode, input voltage V
IN
= V
GS
= V
DS.
Dif-
ferent V
IN
produces an Output Current I
OUT
= I
DS(ON)
character-
istic and results in an effective variable resistor that varies in value
exponentially with V
IN
. This V
IN
, when connected across each
supercapacitor in a series, balances each supercapacitor to within
its voltage and current limits.
When V
IN
= 1.80V is applied to an ALD810018/ALD910018, its
I
OUT
is 1µA. For a 100mV increase in V
IN
, to 1.90V, I
OUT
increases
by about tenfold. For an additional increase in V
IN
to 2.02V for the
ALD910018 (2.04V for the ALD810018), I
OUT
increases one hun-
dredfold, to 100µA. Conversely, for a 100mV decrease in V
IN
to
1.70V, I
OUT
decreases to one tenth of its previous value, to 0.1µA.
Another 100mV decrease in input voltage would reduce I
OUT
to
0.01µA. Hence, when an ALD810018/ALD910018 SAB MOSFET
is connected across a supercapacitor that charges to less than
1.60V, it would dissipate essentially no power.
(Continued on next page)
FEATURES & BENEFITS
• Simple and economical to use
• Precision factory trimmed
• Automatically regulates and balances leakage currents
• Effective for supercapacitor charge-balancing
• Balances up to 4 supercaps with a single IC package
• Balances 2-cell, 3-cell, 4-cell series-connected supercaps
• Scalable to larger supercap stacks and arrays
• Near zero additional leakage currents
• Zero leakage at 0.3V below rated voltages
• Balances series and/or parallel-connected supercaps
• Leakage currents are exponential function of cell voltages
• Active current ranges from <0.3nA to >1000µA
• Always active, always fast response time
• Minimizes leakage currents and power dissipation
APPLICATIONS
• Series-connected supercapacitor cell leakage balancing
• Energy harvesting
• Long term backup battery with supercapacitor outputs
• Zero-power voltage divider at selected voltages
• Matched current mirrors and current sources
• Zero-power mode maximum voltage limiter
• Scaled supercapacitor stacks and arrays
PIN CONFIGURATIONS
ALD810018
IC*
1
M1
M2
16
15
14
V-
V-
13
12
M4
M3
11
10
V-
V-
9
IC*
D
N2
G
N2
S
N2
V+
D
N3
G
N3
S
N3
D
N1
2
G
N1
3
S
N1
4
V-
5
D
N4
6
PRODUCT FAMILY SPECIFICATIONS
For more information on supercapacitor balancing, how SAB
MOSFETs achieve automatic supercapacitor balancing, the device
characteristics of the SAB MOSFET family, product family product
selection guide, applications, configurations, and package infor-
mation, please download from www.aldinc.com the document:
“ALD8100xx/ALD9100xx Family of Supercapacitor Auto Balanc-
ing (SAB™) MOSFET ARRAYs”
IC*
1
V-
G
N4
7
S
N4
8
SCL PACKAGE
ALD910018
8 V+
7 G
N2
6 D
N2
5 S
N2,
V-
ORDERING INFORMATION
(“L” suffix
denotes lead-free (RoHS))
Operating Temperature Range
Package
16-Pin SOIC
8-Pin SOIC
0°C to +70°C
(Commercial)
ALD810018SCL
ALD910018SAL
-40°C to +85°C
(Industrial)
ALD810018SCLI
ALD910018SALI
www.aldinc.com
G
N1
2
D
N1
3
S
N1
4
SAL PACKAGE
*IC pins are internally connected, connect to V-
©2014 Advanced Linear Devices, Inc., Vers. 2.0
1 of 6
GENERAL DESCRIPTION (CONT.)
The voltage dependent characteristic of the ALD810018/
ALD910018 on-resistance is effective in controlling excessive volt-
age rise across a supercapacitor when connected across it. In se-
ries-connected supercapacitor stacks, when one supercapacitor
voltage rises, the voltage of the other supercapacitors drops, with
the ones that have the highest leakage currents having the lowest
supercapacitor voltages. The SAB MOSFETs connected across
these supercapacitors would exhibit complementary opposing cur-
rent levels, resulting in little additional leakage currents other than
those caused by the supercapacitors themselves.
For technical assistance, please contact ALD technical support at
techsupport@aldinc.com.
APPLYING THE ALD810018/ALD910018:
1) Select a maximum supercapacitor leakage current limit for any
supercapacitor used in the stack. This is the same as output cur-
rent, I
OUT
= I
DS(ON)
, of the ALD810018/ALD910018. Test that each
supercapacitor leakage current meets this maximum current limit
before use in the stack.
2) Determine whether the input voltage V
IN
(V
GS
= V
DS
) at that
I
OUT
is acceptable for the intended application. This voltage is the
same voltage as the maximum desired operating voltage of the
supercapacitor. For example, with the ALD810018, I
OUT
= 1000µA
corresponds to V
IN
= 2.32V.
3) Determine that the operating voltage margin, due to various
tolerances and/or temperature effects, is adequate for the intended
operating environment of the supercapacitor.
SCHEMATIC DIAGRAM OF A TYPICAL
CONNECTION FOR A FOUR-SUPERCAP STACK
ALD8100XX
V+
≤
+15.0V
IDS(ON)
≤
80mA
SCHEMATIC DIAGRAM OF A TYPICAL
CONNECTION FOR A TWO-SUPERCAP STACK
2, 12
3
M1
4
15
14
M2
13
11
10
M3
9
6
7
M4
+
C1
V1
ALD9100XX
V+
≤
+15.0V
IDS(ON)
≤
80mA
+
C1
V1
+
C2
3, 8
V2
+
C3
V3
+
C4
2
M1
4
7
6
M2
+
C2
1, 5
1, 5, 8, 16
1-16 DENOTES PACKAGE PIN NUMBERS
C1-C4 DENOTES SUPERCAPACITORS
1-8 DENOTES PACKAGE PIN NUMBERS
C1-C2 DENOTES SUPERCAPACITORS
ALD810018/ALD910018
Advanced Linear Devices, Inc.
2 of 6
ABSOLUTE MAXIMUM RATINGS
V+ to V- voltage
15.0V
Drain-Source voltage, VDS
10.6V
Gate-Source voltage, VGS
10.6V
Operating Current
80mA
Power dissipation
500mW
Operating temperature range SCL
0°C to +70°C
Operating temperature range SCLI
-40°C to +85°C
Storage temperature range
-65°C to +150°C
Lead temperature, 10 seconds
+260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V, V- = GND, TA = 25
°
C, VIN = VGS =VDS, IOUT = IDS(ON) unless otherwise specified
ALD810018
Parameter
Gate Threshold Voltage
Offset Voltage
Offset Voltage Tempco
Gate Threshold Voltage Tempco
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Drain Source Breakdown Voltage
Drain Source Leakage Current
1
Symbol
Vt
VOS
TCVOS
TCVt
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
BVDSX
IDS(OFF)
10.6
10
400
4
Gate Leakage Current
1
IGSS
5
200
1
Input Capacitance
Turn-on Delay Time
Turn-off Delay Time
Crosstalk
CISS
ton
toff
15
10
10
60
Min
1.78
Typ
1.80
5
5
-2.2
0.0001
14000
0.001
1500
0.01
160
0.1
17
1
1.8
10
0.19
100
0.020
300
0.007
1000
0.002
3000
0.001
10000
0.0003
Max
1.82
20
Unit
V
mV
µV/C
mV/C
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
V
pA
nA
pA
nA
pF
ns
ns
dB
f = 100KHz
VIN = VGS = VDS = Vt - 1.0
VIN = VGS = VDS = Vt - 1.0,
TA = +125°C
VGS = 5.0V, VDS = 0V
VGS = 5.0V, VDS = 0V,
TA = +125°C
VGS = 0V, VDS = 5.0V
Test Conditions
VGS = VDS; IDS(ON) = 1µA
Vt1 - Vt2 or Vt3 - Vt4
Vt1 - Vt2 or Vt3 - Vt4
VGS = VDS; IDS(ON) = 1µA
VIN = 1.40V
VIN = 1.50V
VIN = 1.60V
VIN = 1.70V
VIN = 1.80V
VIN = 1.90V
VIN = 2.04V
VIN = 2.14V
VIN = 2.32V
VIN = 2.62V
VIN = 3.22V
ALD810018/ALD910018
Advanced Linear Devices, Inc.
3 of 6
ABSOLUTE MAXIMUM RATINGS
V+ to V- voltage
15.0V
Drain-Source voltage, VDS
10.6V
Gate-Source voltage, VGS
10.6V
Operating Current
80mA
Power dissipation
500mW
Operating temperature range SAL
0°C to +70°C
Operating temperature range SALI
-40°C to +85°C
Storage temperature range
-65°C to +150°C
Lead temperature, 10 seconds
+260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V, V- = GND, TA = 25
°
C, VIN = VGS =VDS, IOUT = IDS(ON) unless otherwise specified
ALD910018
Parameter
Gate Threshold Voltage
Offset Voltage
Offset Voltage Tempco
Gate Threshold Voltage Tempco
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Output Current
Drain Source On Resistance
Drain Source Breakdown Voltage
Drain Source Leakage Current
1
Symbol
Vt
VOS
TCVOS
TCVt
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
IOUT
RDS(ON)
BVDSX
IDS(OFF)
10.6
10
400
4
Gate Leakage Current
1
IGSS
5
200
1
Input Capacitance
Turn-on Delay Time
Turn-off Delay Time
Crosstalk
CISS
ton
toff
30
10
10
60
Min
1.78
Typ
1.80
5
5
-2.2
0.0001
14000
0.001
1500
0.01
160
0.1
17
1
1.8
10
0.19
100
0.020
300
0.007
1000
0.002
3000
0.001
10000
0.0003
Max
1.82
20
Unit
V
mV
µV/C
mV/C
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
µA
MΩ
V
pA
nA
pA
nA
pF
ns
ns
dB
f = 100KHz
VIN = VGS = VDS = Vt - 1.0
VIN = VGS = VDS = Vt - 1.0,
TA = +125°C
VGS = 5.0V, VDS = 0V
VGS = 5.0V, VDS = 0V,
TA = +125°C
VGS = 0V, VDS = 5.0V
Test Conditions
VGS = VDS; IDS(ON) = 1µA
Vt1 - Vt2
Vt1 - Vt2
VGS = VDS; IDS(ON) = 1µA
VIN = 1.40V
VIN = 1.50V
VIN = 1.60V
VIN = 1.70V
VIN = 1.80V
VIN = 1.90V
VIN = 2.02V
VIN = 2.10V
VIN = 2.24V
VIN = 2.30V
VIN = 2.80V
ALD810018/ALD910018
Advanced Linear Devices, Inc.
4 of 6
SOIC-16 PACKAGE DRAWING
16 Pin Plastic SOIC Package
E
Millimeters
Dim
Min
1.35
0.10
0.35
0.18
9.80
3.50
Max
1.75
0.25
0.45
0.25
10.00
4.05
1.27 BSC
5.70
0.60
0°
0.25
6.30
0.937
8°
0.50
Min
0.053
0.004
0.014
0.007
0.385
0.140
Inches
Max
0.069
0.010
0.018
0.010
0.394
0.160
S (45°)
A
A
1
b
C
D-16
D
E
e
H
L
0.050 BSC
0.224
0.024
0°
0.010
0.248
0.037
8°
0.020
A
e
b
A
1
ø
S
S (45°)
H
C
L
ø
ALD810018/ALD910018
Advanced Linear Devices, Inc.
5 of 6
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