LPC11A14FBD48/301, datasheet, PDF

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LPC11A14FBD48/301,: DescriptionMCU 32-bit ARM Cortex M0 RISC 32KB Flash 3.3V 48-Pin LQFP Tray; File Size800KB，84 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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LPC11A14FBD48/301, Overview

MCU 32-bit ARM Cortex M0 RISC 32KB Flash 3.3V 48-Pin LQFP Tray

LPC11A14FBD48/301, Parametric

Parameter Name	Attribute value
EU restricts the use of certain hazardous substances	Compliant
ECCN (US)	3A991a.2.
Part Status	Active
HTS	8542.31.00.01
Family Name	LPC11Axx
Instruction Set Architecture	RISC
Device Core	ARM Cortex M0
Core Architecture	ARM
Maximum CPU Frequency (MHz)	50
Maximum Clock Rate (MHz)	50
Data Bus Width (bit)	32
Program Memory Type	Flash
Program Memory Size	32KB
RAM Size	8KB
Programmability	Yes
Interface Type	I2C/SPI/SSP/USART
Number of I/Os	42
No. of Timers	4
Number of ADCs	Single
ADC Channels	8
ADC Resolution (bit)	10
Number of DACs	Single
DAC Channels	1
DAC Resolution (bit)	10
USART	1
UART	0
USB	0
SPI	2
I2C	1
I2S	0
CAN	0
Ethernet	0
Watchdog	1
Analog Comparators	1
Minimum Operating Supply Voltage (V)	2.6
Typical Operating Supply Voltage (V)	3.3
Maximum Operating Supply Voltage (V)	3.6
Maximum Power Dissipation (mW)	1500
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	85
Packaging	Tray
Supplier Package	LQFP
Pin Count	48
Mounting	Surface Mount
Package Height	1.45(Max)
Package Length	7.1(Max)
Package Width	7.1(Max)
PCB changed	48

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LPC11Axx

32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB

SRAM, 4 kB EEPROM; configurable analog/mixed-signal

Rev. 4 — 30 October 2012

Product data sheet

1. General description

The LPC11Axx are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for

8/16-bit microcontroller applications, offering performance, low power, simple instruction

set and memory addressing together with reduced code size compared to existing 8/16-bit

architectures.

The LPC11Axx operate at CPU frequencies of up to 50 MHz.

Analog/mixed-signal subsystems can be configured by software from interconnected

digital and analog peripherals.

The digital peripherals on the LPC11Axx include up to 32 kB of flash memory, up to 4 kB

of EEPROM data memory, up to 8 kB of SRAM data memory, a Fast-mode Plus I

C-bus

interface, a RS-485/EIA-485 USART, two SSP controllers, four general purpose

counter/timers, and up to 42 general purpose I/O pins.

Analog peripherals include a 10-bit ADC, a 10-bit DAC, an analog comparator, a

temperature sensor, an internal voltage reference, and UnderVoltage LockOut (UVLO)

protection.

2. Features and benefits



System:



ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.



ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).



Serial Wire Debug (SWD)



JTAG boundary scan.



System tick timer.



Memory:



Up to 32 kB on-chip flash program memory.



Up to 4 kB on-chip EEPROM data memory; byte erasable and byte programmable.



Up to 8 kB SRAM data memory.



16 kB boot ROM.



In-System Programming (ISP) for flash and In-Application Programming (IAP) for

flash and EEPROM via on-chip bootloader software.



Includes ROM-based 32-bit integer division and I

C-bus driver routines.



Digital peripherals:



Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down

resistors, repeater mode, and open-drain mode.

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