IS-1845ASRH, IS-1845ASEH
NOT RECOM
MENDED FO
R NEW DESIG
R E C O MME N
NS
DED REPLA
CEMENT PA
ISL7884XAR
RT
H, ISL7884X
AEH
DATASHEET
FN9001
Rev 6.00
October 16, 2015
Single Event Radiation Hardened High Speed, Current Mode PWM
The IS-1845ASRH, IS-1845ASEH are designed to be used in
switching power supplies operating in current-mode. The rising
edge of the on-chip oscillator turns on the output. Turn-off is
controlled by the current sense comparator and occurs when
the sensed current reaches a peak controlled by the error
amplifier.
Constructed with Intersil’s Rad Hard Silicon Gate (RSG)
dielectrically isolated BiCMOS process, these devices are
immune to single event latch-up and have been specifically
designed to provide a high level of immunity to single event
transients. All specified parameters are guaranteed and tested
for 300krad(Si) total dose performance at a high dose rate and
50krad(Si) total dose at a low dose rate.
Detailed Electrical Specifications for these devices are
contained in the SMD
5962-01509.
A “hot-link” is also
provided on our website for downloading the SMD.
Features
• Electrically Screened to DSCC SMD #
5962-01509
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Environment
- High Dose Rate. . . . . . . . . . . . . . . . . . . . .300 krad(SI) (Max)
- Low Dose Rate . . . . . . . . . . . . . . . . . . . . . . 50 krad(SI) (Max)
- SEL Immune . . . . . . . . . . . . . . . . . . . . Dielectrically Isolated
- SEU Immune. . . . . . . . . . . . . . . . . . . . . . . . 35MeV/mg/cm
2
- SEU Cross-Section at 89MeV/mg/cm
2
. . . . . . 5 x 10
-6
cm
2
• Low Start-up Current . . . . . . . . . . . . . . . . . . . . . . . 100µA (Typ)
• Fast Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . 80ns (Typ)
• Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . 12V to 20V
• High Output Drive. . . . . . . . . . . . . . . . . . . . . . . . 1A (Peak, Typ)
• Undervoltage Lockout . . . . . 8.8V Start (Typ), 8.2V Stop (Typ)
Applications
• Current-Mode Switching Power Supplies
• Control of High Current FET Drivers
• Motor Speed and Direction Control
Pin Configurations
IS7-1845ASRH, IS7-1845ASEH
(8 LD CDIP2-T8 SBDIP)
TOP VIEW
COMP
VFB
ISENSE
RTCT
1
2
3
4
8
7
6
5
VREF
VCC
OUT
GND
NC
COMP
VFB
NC
NC
NC
ISENSE
RTCT
NC
IS9-1845ASRH, IS9-1845ASEH
(18 LD FLATPACK)
TOP VIEW
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
NC
VREF
VCC
VC
OUT
NC
GND
OSCGND
NC
NOTES:
1. Grounding the COMP pin does not inhibit the output. The output may be inhibited by applying >1.2V to the ISENSE pin.
2. This part should be operated with C
t
= 3.3nF and R
t
= 10k timing components only.
FN9001 Rev 6.00
October 16, 2015
Page 1 of 3
IS-1845ASRH, IS-1845ASEH
Ordering Information
ORDERING NUMBER
5962F0150901V9A
5962F0150902V9A
IS0-1845ASRH/Sample
5962F0150901VPC
5962F0150902VPC
5962F0150901QPC
5962F0150901VXC
5962F0150902VXC
5962F0150901QXC
IS7-1845ASRH/Proto
IS9-1845ASRH/Proto
INTERNAL
MKT. NUMBER
IS0-1845ASRH-Q
IS0-1845ASEH-Q
IS0-1845ASRH/SAMPLE
IS7-1845ASRH-Q
IS7-1845ASEH-Q
IS7-1845ASRH-8
IS9-1845ASRH-Q
IS9-1845ASEH-Q
IS9-1845ASRH-8
IS7-1845ASRH/PROTO
IS9-1845ASRH/PROTO
TEMP. RANGE
(°C)
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
-50 to +125
Die
Die
Die
8 Ld SBDIP
8 Ld SBDIP
8 Ld SBDIP
18 Ld Flatpack
18 Ld Flatpack
18 Ld Flatpack
8 Ld SBDIP
18 Ld Flatpack
D8.3
D8.3
D8.3
K18.B
K18.B
K18.B
D8.3
K18.3
PACKAGE
PKG.
DWG. #
Typical Performance Curves
10k
C470pF
FREQUENCY (kHz)
1k
C1000pF
C2200pF
C4700pF
100
D
MAX
(%)
60
40
20
0
80
100
D
MAX
10
1
1
10
R
t
TIMING RESISTANCE (kΩ)
100
0.1
1
10
R
t
TIMING RESISTANCE (kΩ)
100
FIGURE 1. OSCILLATOR FREQUENCY vs R
t
and C
t
FIGURE 2. MAXIMUM DUTY CYCLE vs R
t
© Copyright Intersil Americas LLC 2001-2015. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see
www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at
www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see
www.intersil.com
FN9001 Rev 6.00
October 16, 2015
Page 2 of 3
IS-1845ASRH, IS-1845ASEH
Die Characteristics
DIE DIMENSIONS
3090µm x 4080µm (121.6 mils x 159.0 mils)
Thickness: 483µm ± 25.4µm (19 mils ± 1 mil)
Substrate
Radiation Hardened Silicon Gate,
Dielectric Isolation
Backside Finish
Silicon
INTERFACE MATERIALS
Glassivation
Type: Phosphorus Silicon Glass (PSG)
Thickness: 8.0kA ± 1.0kA
Top Metallization
Type: AlSiCu
Thickness: 16.0kA ± 2kA
ASSEMBLY RELATED INFORMATION
Substrate Potential
Unbiased (DI)
ADDITIONAL INFORMATION
Worst Case Current Density
<2.0 x 10
5
A/cm
2
Transistor Count
582
Metallization Mask Layout
IS-1845ASRH
ISENSE
VFB
COMP
RTCT
OSCGND
VREF
GND
GND
OUT
NOTES:
3. Both the GND pads must be bonded to ground.
4. The OUT double-sized bond pad must be double bonded for current sharing purposes.
VC
VCC
5. The OSCGND double-sized bond pad must be double bonded to ground for current sharing purposes.
FN9001 Rev 6.00
October 16, 2015
Page 3 of 3
京公网安备 11010802033920号
EEWORLD
