SI50122-A6-EVB datasheet, PDF - EEWORLD Datasheet

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SI50122-A6-EVB: DescriptionClock and timer development tools; CategoryEmbedded solution Engineering tools Analog and digital IC development tools The clock and timer development tools; File Size289KB，14 Pages; ManufacturerSilicon Labs; Websitehttps://www.silabs.com; Environmental Compliance

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SI50122-A6-EVB Overview

Clock and timer development tools

SI50122-A6-EVB Parametric

Parameter Name	Attribute value
Maker	Silicon Labs
Product Category	Clock and timer development tools
product	Evaluation Boards
type	Clock Generators
Tools for assessment	Si50122-A6-GM
frequency	100 MHz
Encapsulation	Bulk
Description/Function	Used to evaluate the high performance, crystal-less PCIe clock generator with internal CMEMS
series	SI50122
used for	Si50122-A6-GM
Factory packaging quantity	1

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Si50122-A3/A4

R YS TA L

L E S S

PCI-E

XPRESS

1 & G

U A L

UTPUT

L O C K

ENERATOR

Features



Applications



Digital TV

Set top box

Solid State Drives (SSD)

Wireless Access Point

Home Gateway

fo R

r N ec

D e

es nd

ig e

ns d

Network Attached Storage



Multi-function Printer



Wireless Access Point



Digital Video Cameras



VSS

Crystal-less clock generator with



integrated CMEMS

PCI-Express Gen 1/2 compliant

Two PCIe 100 MHz differential



HCSL outputs



One 25 MHz single-ended

LVCMOS output



Supports Serial (ATA) at

100 MHz



Low power differential output

buffers



No termination resistors required

for differential output clocks

Triangular spread spectrum

profile for maximum EMI

reduction (Si50122-A4)

Industrial Temperature –40 to

85 °C

2.5 V, 3.3 V Power supply

Small package 10-pin TDFN

(2.0x2.5 mm)

Si50122-A3 does not support

spread spectrum outputs

Si50122-A4 supports 0.5% down

spread outputs

Ordering Information:

See page 10

Pin Assignments

VDD

DIFF2

VSS

REFOUT

DIFF1

Description

DIFF1

Si50122-A3/A4 is a high performance, crystal-less PCIe clock generator

that can generate two 100 MHz PCIe clock and one 25 MHz LVCMOS

clock outputs. The differential clock outputs are compliant to PCIe Gen1

and Gen 2 specifications. The ultra-small footprint (2.0x2.5 mm) and

industry leading low power consumption make Si50122-A3/A4 the ideal

clock solution for consumer and embedded applications where board

space is limited and low power is needed.

Patents pending

Functional Block Diagram

VDD

REFOUT

DIFF1

CMEMS

PLL

(SSC)

Divider

DIFF2

VSS

Rev 0.7 9/14

Si50122-A3/A4

SI50122-A6-EVB Related Products

	SI50122-A6-EVB	SI50122-A3-EVB	SI50122-A4-EVB
Description	Clock and timer development tools	Clock and timer development tools	Clock and timer development tools
Maker	Silicon Labs	Silicon Labs	Silicon Labs
Product Category	Clock and timer development tools	Clock and timer development tools	Clock and timer development tools
product	Evaluation Boards	Evaluation Boards	Evaluation Boards
type	Clock Generators	Clock Generators	Clock Generators
Tools for assessment	Si50122-A6-GM	Si50122-A1-GM, Si50122-A3-GM	Si50122-A2-GM, Si50122-A4-GM
frequency	100 MHz	100 MHz	100 MHz
Description/Function	Used to evaluate the high performance, crystal-less PCIe clock generator with internal CMEMS	Used to evaluate the high performance, crystal-less PCIe clock generator with internal CMEMS	Used to evaluate the high performance, crystal-less PCIe clock generator with internal CMEMS
used for	Si50122-A6-GM	Si50122-A1-GM, Si50122-A3-GM	Si50122-A2-GM, Si50122-A4-GM
Factory packaging quantity	1	1	1

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