DC current is also limited by the thermal design of the system.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
16 TQFN
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
48°C/W
10°C/W
T1633+5C
21-0136
90-0032
For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages.
Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
www.maximintegrated.com
Maxim Integrated │
2
MAX17523
1A Adjustable Overcurrent and Overvoltage
Protector with High Accuracy
Electrical Characteristics
(V
IN
= 4.5V to 36V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 24V, R
SETI
= 12kΩ, T
A
= +25°C.) (Note 2)
PARAMETER
IN Voltage
Shutdown IN Current
Shutdown OUT Current
Reverse IN Current
Supply Current
Internal Overvoltage Trip Level
Internal Undervoltage Trip Level
Overvoltage Lockout Hysteresis
External OVLO Adjustment
Range
External OVLO Select Threshold
Voltage
External OVLO Leakage
External UVLO Adjustment
Range
External UVLO Select Threshold
Voltage
External UVLO Leakage
BG Reference Voltage
CLHS Voltage
INTERNAL FETs
Internal FETs On-Resistance
Current-Limit Adjustment Range
Current-Limit Accuracy
FLAG
Assertion Drop Voltage
Threshold
FLAG
Output Logic-Low Voltage
FLAG
Output Leakage Current
Reverse Current-Blocking
Threshold
Reverse-Current-Blocking
Response Time
Reverse-Blocking Supply Current
V
RIB
t
RIB
I
RBL
V
FA
R
ON
I
LIM
0.15A ≤ I
LIM
< 0.3A
0.3A ≤ I
LIM
< 1.0A
Increase (V
IN
- V
OUT
) drop until
FLAG
asserts, V
IN
= 24V
I
SINK
= 1mA
V
IN
= V
FLAG
= 5V, flag deasserted
V
OUT
- V
IN
(Note 4)
V
OUT
- V
IN
> 1V
40
0.6
1.3
I
LOAD
= 100mA, V
IN
≥ 8V
0.15
-20
-10
400
600
190
370
1.0
+20
+10
800
0.4
2
80
1.0
3.0
mΩ
A
%
mV
V
µA
mV
µs
mA
V
SEL_UVLO
I
UVLO_LEAK
V
BG
V
CLHS
Source 100µA
V
UVLO
< 1.2V
V
SEL_OVLO
I
OVLO_LEAK
V
OVLO
< 1.2V
(Note 3)
SYMBOL
V
IN
I
SHDN
I
OFF
I
IN_RVS
I
IN
V
OVLO
V
UVLO
V
EN
= 0V, V
HVEN
= 5V
V
EN
= 0V, V
HVEN
= 5V,
V
OUT
= 0V
V
IN
= -40V, V
OUT
= V
GND
= 0V
V
IN
= 15V, V
HVEN
= 0V
V
IN
rising
V
IN
falling
V
IN
falling
V
IN
rising
% of typical OVLO
(Note 3)
6
0.3
-100
4.5
0.3
-100
1.196
2.0
1.220
3.5
0.4
0.4
32
30.3
17.5
18.2
-10
530
33
32
18.5
19.2
3
36
0.5
+100
24
0.5
+100
1.247
800
34.3
33.7
19.5
20.2
CONDITIONS
MIN
4.5
6.6
0.1
TYP
MAX
36
16
2
UNITS
V
µA
µA
µA
µA
V
V
%
V
V
nA
V
V
nA
V
V
www.maximintegrated.com
Maxim Integrated │
3
MAX17523
1A Adjustable Overcurrent and Overvoltage
Protector with High Accuracy
Electrical Characteristics (continued)
(V
IN
= 4.5V to 36V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 24V, R
SETI
= 12kΩ, T
A
= +25°C.) (Note 2)
PARAMETER
LOGIC INPUTS
HVEN
Threshold Voltage
HVEN
Threshold Hysteresis
HVEN
Input Current
HVEN
Input Reverse Current
EN,
RIEN,
CLTS1, CLTS2,
CLTS_MODE Input Logic-High
EN,
RIEN,
CLTS1, CLTS2,
CLTS_MODE Input Logic- Low
EN,
RIEN,
CLTS1, CLTS2,
CLTS_MODE Input Leakage
Current
DYNAMIC (NOTE 4)
Switch Turn-On Time
Switch Turn-Off Time
Overvoltage Switch Turn-Off
Time
Overcurrent Switch Turn-Off Time
IN Debounce Time
Blanking Time
Autoretry Time
THERMAL PROTECTION
Thermal Shutdown
Thermal Shutdown Hysteresis
150
30
ºC
ºC
t
ON
t
OFF
t
OFF_OVP
t
OFF_OCP
t
DEB
t
BLANK
t
RETRY
After blanking time from I
OUT
> I
LIM
to
FLAG
deasserted
From OFF to ON (see Table 2),
R
LOAD
= 240Ω, C
OUT
= 470µF
From ON to IOUT falling below 10%,
R
LOAD
= 47Ω
From (V
IN
> V
OVLO
) to
(V
OUT
= 80% of V
IN_OVLO
),
R
LOAD
= 47Ω
After t
BLANK
From (V
IN_UVLO
< V
IN
< V
IN_OVLO
)
and (EN = high or
HVEN
= low) to
V
OUT
= 10% of V
IN
14
17.8
527
500
35
3
3
16.5
21
620
19
24.1
713
µs
µs
µs
µs
ms
ms
ms
I
HVEN_
I
HVEN_R
V
IH
V
IL
V
LOGIC
= 5V
-1
V
HVEN
= 36V
V
IN
= V
HVEN
= -36V
-43
1.4
0.4
+1
V
HVENTH
1
2
2
26
-28
41
3.5
V
%
µA
µA
V
V
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
LEAK
Note 2:
All devices are 100% production tested at T
A
= + 25°C. Specifications over the operating temperature range are guaranteed
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