dsPIC33EP64GS505-I/PT datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> dsPIC33EP64GS505-I/PT

Preview

dsPIC33EP64GS505-I/PT: DescriptionDigital Signal Processors and Controllers - DSP, DSC dsPIC 64KB Flash 70 MIPS; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，391 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

Download Datasheet Parametric View All

dsPIC33EP64GS505-I/PT Overview

Digital Signal Processors and Controllers - DSP, DSC dsPIC 64KB Flash 70 MIPS

dsPIC33EP64GS505-I/PT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	TQFP-48
Reach Compliance Code	compliant
Factory Lead Time	8 weeks
Has ADC	YES
Address bus width
bit size	16
maximum clock frequency	60 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQFP-G48
JESD-609 code	e3
length	7 mm
Number of I/O lines	35
Number of terminals	48
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	HTFQFP
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
RAM (bytes)	8192
rom(word)	65536
ROM programmability	FLASH
Filter level	TS 16949
Maximum seat height	1.2 mm
speed	70 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	7 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

Preview

Download Datasheet

View All

dsPIC33EPXXGS50X FAMILY

16-Bit Digital Signal Controllers for Digital Power Applications with

Interconnected High-Speed PWM, ADC, PGA and Comparators

Operating Conditions

• 3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS

• 3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS

Advanced Analog Features

• High-Speed ADC module:

- 12-bit with 4 dedicated SAR ADC cores and

one shared SAR ADC core

- Configurable resolution (up to 12-bit) for each

ADC core

- Up to 3.25 Msps conversion rate per channel

at 12-bit resolution

- 12 to 22 single-ended inputs

- Dedicated result buffer for each analog channel

- Flexible and independent ADC trigger sources

- Two digital comparators

- Two oversampling filters for increased

resolution

• Four Rail-to-Rail Comparators with Hysteresis:

- Dedicated 12-bit Digital-to-Analog Converter

(DAC) for each analog comparator

- Up to two DAC reference outputs

- Up to two external reference inputs

• Two Programmable Gain Amplifiers:

- Single-ended or independent ground reference

- Five selectable gains (4x, 8x, 16x, 32x and 64x)

- 40 MHz gain bandwidth

Flash Architecture

• Dual Partition Flash Program Memory with

Live Update (64-Kbyte devices):

- Supports programming while operating

- Supports partition soft swap

Core: 16-Bit dsPIC33E CPU

Code-Efficient (C and Assembly) Architecture

Two 40-Bit Wide Accumulators

Single-Cycle (MAC/MPY) with Dual Data Fetch

Single-Cycle Mixed-Sign MUL Plus

Hardware Divide

• 32-Bit Multiply Support

• Two Additional Working Register Sets (reduces

context switching)

•

Clock Management

•

±0.9% Internal Oscillator

Programmable PLLs and Oscillator Clock Sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast Wake-up and Start-up

Interconnected SMPS Peripherals

• Reduces CPU Interaction to Improve Performance

• Flexible PWM Trigger Options for

ADC Conversions

• High-Speed Comparator Truncates PWM

(15 ns typical):

- Supports Cycle-by-Cycle Current mode control

- Current Reset mode (variable frequency)

Power Management

• Low-Power Management modes (Sleep,

Idle, Doze)

• Integrated Power-on Reset and Brown-out Reset

• 0.5 mA/MHz Dynamic Current (typical)

• 10

μA

Current (typical)

High-Speed PWM

• Five PWM Generators (two outputs per generator)

• Individual Time Base and Duty Cycle for each PWM

• 1.04 ns PWM Resolution (frequency, duty cycle,

dead time and phase)

• Supports Center-Aligned, Redundant, Complementary

and True Independent Output modes

• Independent Fault and Current-Limit Inputs

• Output Override Control

• PWM Support for AC/DC, DC/DC, Inverters, PFC

and Lighting

Timers/Output Compare/Input Capture

• Five 16-Bit and up to Two 32-Bit Timers/Counters

• Four Output Compare (OC) modules, Configurable

as Timers/Counters

• Four Input Capture (IC) modules



2013-2017 Microchip Technology Inc.

DS70005127D-page 1

Recommended Resources

Wanbao BCD-235 refrigerator circuit

Practical circuit based on LT3468 dual output boost LED driver

Gas-sensitive control circuit composed of operational amplifier

29MHz receiving decoding circuit

Design circuit diagram for output voltage absolute value 0 to 15V

Computer motherboard circuit diagram 440LX2_06

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components