EFC2J004NUZ
Power MOSFET
for 1-Cell Lithium-ion Battery Protection
12 V, 7.1 mΩ, 14 A, Dual N-Channel
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This Power MOSFET features a low on-state resistance. This device is
suitable for applications such as power switches of portable machines. Best
suited for 1-cell lithium-ion battery applications.
VSSS
Features
2.5 V Drive
2 kV ESD HBM
Common-Drain Type
ESD Diode-Protected Gate
Pb-Free, Halogen Free and RoHS compliance
Applications
1-Cell Lithium-ion Battery Charging and Discharging Switch
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
at
Ta = 25C
(Notes 1, 2)
Parameter
Source to Source Voltage
Gate to Source Voltage
Source Current (DC)
Source Current (Pulse)
PW
10s, duty cycle
1%
Total Dissipation (Note 2)
Junction Temperature
Storage Temperature
Symbol
VSSS
VGSS
IS
ISP
PT
Tj
Tstg
Value
12
8
14
60
1.5
150
55
to +150
Unit
V
V
A
A
W
C
C
RSS(on) Max
7.1 mΩ @ 4.5 V
7.7 mΩ @ 3.8 V
9.5 mΩ @ 3.1 V
12.4mΩ @ 2.5 V
IS Max
12 V
14 A
ELECTRICAL CONNECTION
N-Channel
4, 6
5
2
1, 3
1 : Source1
2 : Gate1
3 : Source1
4 : Source2
5 : Gate2
6 : Source2
Note 1 : Stresses exceeding those listed in the Maximum Ratings table may damage
the device. If any of these limits are exceeded, device functionality should not
be assumed, damage may occur and reliability may be affected.
WLCSP6, 2.11x1.18x0.10
THERMAL RESISTANCE RATINGS
Parameter
Junction to Ambient (Note 2)
Symbol
R
JA
2
Value
83
Unit
C/W
GENERIC
MARKING DIAGRAM
NA
AYWZZ
NA
A
Y
W
ZZ
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Assembly Lot
= Pb-Free Package
Note 2 : Surface mounted on ceramic substrate (5000 mm
0.8 mm).
ORDERING INFORMATION
See detailed ordering and shipping
information on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
February 2017 - Rev. 1
Publication Order Number :
EFC2J004NUZ/D
EFC2J004NUZ
ELECTRICAL CHARACTERISTICS
at Ta
½
25C
(Notes 3, 4)
Parameter
Source to Source Breakdown
Voltage
Zero-Gate Voltage Source Current
Gate to Source Leakage Current
Gate Threshold Voltage
Static Source to Source On-State
Resistance (Note 4)
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Total Gate Charge
Forward Source to Source Voltage
Symbol
V(BR)SSS
ISSS
IGSS
VGS(th)
Conditions
IS = 1 mA, VGS = 0 V
VSS = 10 V, VGS = 0 V
VGS =
8
V, VSS = 0 V
VSS = 6 V, IS = 1 mA
IS = 5 A, VGS = 4.5 V
RSS(on)
IS = 5 A, VGS = 3.8 V
IS = 5 A, VGS = 3.1 V
IS = 5 A, VGS = 2.5 V
td(on)
tr
td(off)
tf
Qg
VF(S-S)
VSS = 6 V, VGS = 4.5 V, IS = 14 A
Test Circuit 6
IS = 3 A, VGS = 0 V
Test Circuit 7
Test Circuit 1
Test Circuit 1
Test Circuit 2
Test Circuit 3
Test Circuit 4
Test Circuit 4
Test Circuit 4
Test Circuit 4
0.4
3.7
4.1
4.6
5.8
5.4
5.9
6.7
8.4
15
VSS = 5 V, VGS = 3.8 V, IS = 5 A
Rg = 10 kΩ
Test Circuit 5
35
100
75
36
0.76
Value
min
12
1
1
1.3
7.1
7.7
9.5
12.4
typ
max
Unit
V
A
A
V
mΩ
mΩ
mΩ
mΩ
s
s
s
s
nC
V
Note 3 : Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.
Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Note 4 : Mounted on ON Semiconductor board.
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EFC2J004NUZ
Test circuits are example of measuring FET1 side
Test Circuit 1
V(BR)SSS / ISSS
S2
G2
A
Test Circuit 2
IGSS
S2
G2
G1
S1
VSS
VGS
A
G1
S1
When FET1 is measured,
Gate and Source of FET2
are short-circuited.
Test Circuit 3
VGS(th)
S2
G2
When FET1 is measured,
Gate and Source of FET2
are short-circuited.
Test Circuit 4
RSS(on)
S2
IS
A
G2
V
G1
VSS
S1
VGS
G1
S1
VGS
Test Circuit 5
td(on), tr,td(off), tf
S2
G2
When FET1 is measured,
Gate and Source of FET2
are short-circuited.
Test Circuit 6
Qg
RL
G2
S2
A
V
G1
S1
VSS
IG =1mA
G1
S1
PG
VSS
RL
When FET1 is measured,
Gate and Source of FET2
are short-circuited.
Rg
DC
Test Circuit 7
VF(S-S)
S2
IS
G2
V
VGS=0V
G1
S1
When FET1 is
measured,+4.5V is added to
V
GS
of FET2.
When FET2 is measured, the position of FET1 and FET2 is switched.
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EFC2J004NUZ
6.0
IS -- VSS
V
4.5
V
15
IS -- VGS
VSS=6V
Ta=25C
3.8
5.0
3.1
V
12
Source Current, IS -- A
9
3.0
Ta=75
C
0
0.4
0.8
1.2
VG
6
2.0
1.0
3
0
0
0.01
0.02
0.03
0.04
0.05
0.06
0
--25
C
1.6
25
C
4.0
=
S
Source Current, IS -- A
5V
2.
0.2
0.6
1.0
1.4
1.8
2.0
Source to Source Voltage, VSS -- V
10
RSS(on) -- VGS
Gate to Source Voltage, VGS -- V
Ta=25C
IS=5A
14
RSS(on) -- Ta
Static Source to Source
On-State Resistance, RSS(on) -- m
9
8
Static Source to Source
On-State Resistance, RSS(on) -- m
12
10
=2
V GS
=5A
, IS
.5V
7
8
=
VGS
=5A
V, I S
3.1
6
6
5
4
=5A
5V, I S
=4.
VGS
4
5A
, I S=
=3.8V
V GS
--40
--20
0
20
40
60
80
100
120
140
160
3
1
2
3
4
5
6
7
8
2
--60
Gate to Source Voltage, VGS -- V
10
7
5
3
2
IS -- VF(S-S)
Ambient Temperature, Ta --
C
1000
7
5
SW Time -- Rg
VGS=0V
Switching Time, SW Time --
s
3
2
100
7
5
3
2
10
7
5
3
2
Source Current, IS -- A
5
C
--25
C
0.1
7
5
3
2
0.01
7
5
3
2
0
0.2
Ta=
7
25
C
1.0
7
5
3
2
ff)
t d(o
tf
tr
n
t d(o
)
0.001
0.4
0.6
0.8
1.0
1.2
1.0
1.0
VSS=5V
VGS=3.8V
IS=5A
5
7
10
2
2
3
Forward Source to Source Voltage, VF(S-S) -- V
4.5
4.0
VGS -- Qg
Gate Resistance, Rg -- k
100
7
5
3
2
SOA
Gate to Source Voltage, VGS -- V
VSS=6V
IS=14A
Source Current, IS -- A
ISP=60A
(PW10s)
IS=14A
DC
10
10
10
0
s
s
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
5
10
15
20
25
30
35
40
10
7
5
3
2
1.0
7
5
3
2
0.1
7
5
3
2
1m
s
10
ms
op
0m
era
s
tio
n(
Ta
=2
Operation in this area
5
C)
is limited by RSS(on).
0.01
0.01
Ta=25C
Single pulse
Surface mounted on ceramic substrate
(5000mm
2
0.8mm)
2
3
5 7 0.1
2
3
5 7 1.0
2
3
5 7 10
2
3
Total Gate Charge, Qg -- nC
Source to Source Voltage, VSS -- V
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EFC2J004NUZ
1.6
1.4
PT -- Ta
Surface mounted on ceramic substrate
(5000mm
2
0.8mm)
Total Dissipation, PT -- W
1.2
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
175
200
Ambient Temperature, Ta --
C
100
7
5
3
2
10
7
5
3
2
1.0
7
5
3
2
0.1
0.00001
2
3
5
7 0.0001
2
3
5
7 0.001
2
R
JA
-- Pulse Time
Duty Cycle=0.5
Thermal Resistance, R
JA
-- ºC/W
0.2
0.1
0.05
0.02
0.01
le
Sing
Puls
e
Surface mounted on ceramic substrate
(5000mm
2
0.8mm)
3
5
7 0.01
2
3
5
7 0.1
2
3
5
7 1.0
2
3
5
7
10
Pulse Time, PT -- s
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