CY7S1049G
CY7S1049GE
4-Mbit (512K words × 8-bit) Static RAM
with PowerSnooze™
and Error Correcting Code (ECC)
4-Mbit (512K words × 8-bit) Static RAM with PowerSnooze™ and Error Correcting Code (ECC)
Features
■
High speed
❐
Access time (t
AA
) = 10 ns / 15 ns
Ultra-low power Deep-Sleep (DS) current
❐
I
DS
= 15 µA
Low active and standby currents
❐
Active Current I
CC
= 38-mA typical
❐
Standby Current I
SB2
= 6-mA typical
Wide operating voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V,
4.5 V to 5.5 V
Embedded ECC for single-bit error correction
[1, 2]
Error indication (ERR) pin to indicate 1-bit error detection and
correction
1.0-V data retention
TTL- compatible inputs and outputs
Available in Pb-free 44-pin TSOP II, and 36-pin (400-mil)
molded SOJ
■
■
ultra-low power Deep-Sleep mode
[3]
. With Deep-Sleep mode
currents as low as 15 µA, the CY7S1049G/CY7S1049GE
devices combine the best features of fast and low- power SRAMs
in industry-standard package options. The device also features
embedded ECC. logic which can detect and correct single-bit
errors in the accessed location.
Deep-Sleep input (DS) must be deasserted HIGH for normal
operating mode.
To perform data writes, assert the Chip Enable (CE) and Write
Enable (WE) inputs LOW, and provide the data and address on
device data pins (I/O
0
through I/O
7
) and address pins (A
0
through A
18
) respectively.
To perform data reads, assert the Chip Enable (CE) and Output
Enable (OE) inputs LOW and provide the required address on
the address lines. Read data is accessible on the I/O lines (I/O
0
through I/O
7
).
The device is placed in a low-power Deep-Sleep mode when the
Deep-Sleep input (DS) is asserted LOW. In this state, the device
is disabled for normal operation and is placed in a low power data
retention mode. The device can be activated by deasserting the
Deep-Sleep input (DS) to HIGH.
The CY7S1049G is available in 44-pin TSOP II, and 36-pin
Molded SOJ (400 Mils).
■
■
■
■
■
■
Functional Description
The CY7S1049G/CY7S1049GE
[1]
is a high-performance
PowerSnooze™ static RAM organized as 512K words × 8 bits.
This device features fast access times (10 ns) and a unique
Product Portfolio
Power Dissipation
Product
[4]
Range
V
CC
Range (V)
Speed
(ns)
Operating I
CC
,
(mA)
f = f
max
Typ
[5]
CY7S1049G(E)18
CY7S1049G(E)30
CY7S1049G(E)
Industrial
1.65 V–2.2 V
2.2 V–3.6 V
4.5–5.5 V
15
10
10
–
38
38
Max
40
45
45
Standby, I
SB2
(mA)
Typ
[5]
6
Max
8
Deep-Sleep
current (µA)
Typ
[5]
–
Max
15
Notes
1. This device does not support automatic write back on error detection.
2. SER FIT Rate <0.1 FIT/Mb. Refer
AN88889
for details.
3. Refer
AN89371
for details on PowerSnooze™ feature.
4. ERR pin is available only for devices which have ERR option “E” in the ordering code. Refer
Ordering Information on page 17
for details.
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= 1.8 V (for V
CC
range of 1.65 V–2.2 V), V
CC
= 3 V
(for V
CC
range of 2.2 V–3.6 V), and V
CC
= 5 V (for V
CC
range of 4.5 V–5.5 V), T
A
= 25 °C.
Cypress Semiconductor Corporation
Document Number: 001-95414 Rev. *F
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 3, 2018
CY7S1049G
CY7S1049GE
Contents
Pin Configurations ........................................................... 4
Maximum Ratings ............................................................. 6
Operating Range ............................................................... 6
DC Electrical Characteristics .......................................... 6
Capacitance ...................................................................... 7
Thermal Resistance .......................................................... 7
AC Test Loads and Waveforms ....................................... 8
Data Retention Characteristics ....................................... 9
Data Retention Waveform ................................................ 9
Deep-Sleep Mode Characteristics ................................. 10
AC Switching Characteristics ....................................... 11
Switching Waveforms .................................................... 12
Truth Table ...................................................................... 16
ERR Output – CY7S1049GE ........................................... 16
Ordering Information ...................................................... 17
Ordering Code Definitions ......................................... 17
Package Diagrams .......................................................... 18
Acronyms ........................................................................ 19
Document Conventions ................................................. 19
Units of Measure ....................................................... 19
Document History Page ................................................. 20
Sales, Solutions, and Legal Information ...................... 21
Worldwide Sales and Design Support ....................... 21
Products .................................................................... 21
PSoC® Solutions ...................................................... 21
Cypress Developer Community ................................. 21
Technical Support ..................................................... 21
Document Number: 001-95414 Rev. *F
Page 3 of 21
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