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.
UG-01021-2.0
ii
MegaCore Version 8.0
DDR3 SDRAM High-Performance Controller User Guide
Altera Corporation
Contents
Chapter 1. About This MegaCore Function
Release Information ...............................................................................................................................
Device Family Support .........................................................................................................................
Features ...................................................................................................................................................
General Description ...............................................................................................................................
MegaCore Verification ..........................................................................................................................
Performance and Resource Utilization ...............................................................................................
Installation and Licensing ....................................................................................................................
OpenCore Plus Evaluation ..............................................................................................................
OpenCore Plus Time-Out Behavior ...............................................................................................
1–1
1–1
1–2
1–2
1–3
1–4
1–4
1–5
1–6
Chapter 2. Getting Started
Design Flow ............................................................................................................................................ 2–1
Select Flow .............................................................................................................................................. 2–3
SOPC Builder Flow ................................................................................................................................ 2–3
Specify Parameters ........................................................................................................................... 2–4
Complete the SOPC Builder System .............................................................................................. 2–4
Simulate the System ......................................................................................................................... 2–6
MegaWizard Plug-In Manager Flow .................................................................................................. 2–7
Specify Parameters ........................................................................................................................... 2–7
Simulate the Example Design ....................................................................................................... 2–10
Compile the Example Design ............................................................................................................ 2–11
Program a Device and Implement the Design ................................................................................ 2–13
Chapter 3. Parameter Settings
Memory Settings .................................................................................................................................... 3–1
PHY Settings ........................................................................................................................................... 3–1
Controller Settings ................................................................................................................................. 3–1
Chapter 4. Functional Description
Block Description ................................................................................................................................... 4–1
Control Logic .................................................................................................................................... 4–2
Latency ............................................................................................................................................... 4–3
ECC ..................................................................................................................................................... 4–4
Example Design ..................................................................................................................................... 4–8
Interfaces & Signals ............................................................................................................................... 4–9
Interface Description ........................................................................................................................ 4–9
Signals .............................................................................................................................................. 4–18
Additional Information
Altera Corporation
MegaCore Version 8.0
iii
1. About This MegaCore
Function
Release
Information
Table 1–1
provides information about this release of the DDR3 SDRAM
High-Performance Controller MegaCore
®
functions.
Table 1–1. DDR3 SDRAM High-Performance Controller Release Information
Item
Version
Release Date
Ordering Codes
Product IDs
Vendor ID
Description
8.0
May 2008
IP-SDRAM/DDR3
00C2
00CO (altmemphy Megafunction)
6AF7
Altera verfies that the current version of the Quartus
®
II software
compiles the previous version of each MegaCore function. The
MegaCore
IP Library Release Notes and Errata
report any exceptions to this
verification. Altera does not verify compilation with MegaCore function
versions older than one release.
Device Family
Support
MegaCore functions provide either full or preliminary support for target
Altera
®
device families, as described below:
■
■
Full support
means the MegaCore function meets all functional and
timing requirements for the device family and may be used in
production designs
Preliminary support
means the MegaCore function meets all
functional requirements, but may still be undergoing timing analysis
for the device family; it may be used in production designs with
caution
Altera Corporation
May 2008
MegaCore Version 8.08.0
1–1