PCA9507
2-wire serial bus extender for HDMI DDC I
2
C-bus and SMBus
Rev. 01 — 7 February 2008
Product data sheet
1. General description
The PCA9507 is a 2-wire serial bus extender providing 3.3 V to 5 V level shift that allows
up to 18 meters bus extension for reliable DDC, I
2
C-bus or SMBus applications. While
retaining all the operating modes and features of the I
2
C-bus system during the level
shifts, it also permits extension of the I
2
C-bus by providing bidirectional buffering for both
the data (SDA) and the clock (SCL) line as well as the rise time accelerator on port A
enabling the bus to drive a load up to 1400 pF or distance of 18 m on port A, and 400 pF
on port B. Using the PCA9507 enables the system designer to isolate bus capacitance to
meet HDMI DDC version 1.3 distance specification. The SDA and SCL pins are
overvoltage tolerant and are high-impedance when the PCA9507 is unpowered.
The port B drivers with static level offset behave much like the drivers on the PCA9515
device, while the port A drivers integrate the rise time accelerator, sink more current and
eliminate the static offset voltage. This results in a LOW on port B translating into a nearly
0 V LOW on port A. The static level offset design of the port B I/O drivers prevent them
from being connected to another device that has rise time accelerator including the
PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516A, PCA9517
(B-side), or PCA9518. The port A sides of two or more PCA9507s can be connected
together, however, to allow a star topography with port A on the common bus, and port A
can be connected directly to any other buffer with static or dynamic offset voltage. Multiple
PCA9507s can be connected in series, port A to port B, with no build-up in offset voltage
with only time of flight delays to consider. Rise time accelerator on port A is turned on
when input threshold is above 0.3V
CC(A)
.
The PCA9507 drivers are not enabled unless V
CC(A)
and V
CC(B)
are above 2.7 V. The EN
pin can also be used to turn the drivers on and off under system control. Caution should
be observed to only change the state of the enable pin when the bus is idle. The output
pull-down on the port B internal buffer LOW is set for approximately 0.5 V, while the input
threshold of the internal buffer is set about 70 mV lower (0.43 V). When the port B I/O is
driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a
lock-up condition from occurring.
2. Features
I
2 channel, bidirectional buffer isolates capacitance allowing 1400 pF on port A and
400 pF on port B
I
Exceeds 18 meters (above the maximum distance for HDMI DDC)
I
Rise time accelerator and normal I/O on port A
I
Static level offset on port B
I
Voltage level translation from 2.7 V to 5.5 V
I
Upgrade replacement over PCA9517 for cable application
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I
2
C-bus and SMBus
I
I
I
I
I
I
I
I
I
I
I
I
2
C-bus, SMBus and DDC-bus compatible
Active HIGH buffer enable input
Open-drain input/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Accommodates Standard-mode and Fast-mode I
2
C-bus devices and multiple masters
Powered-off high-impedance I
2
C-bus pins
Port A operating supply voltage range of 2.7 V to 5.5 V
Port B operating supply voltage range of 2.7 V to 5.5 V
5 V tolerant I
2
C-bus and enable pins
0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be
less than 400 kHz because of the delays added by the repeater)
I
ESD protection exceeds 5000 V HBM per JESD22-A114, 400 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
I
Packages offered: SO8 and TSSOP8
3. Ordering information
Table 1.
Ordering information
Topside
mark
PCA9507
9507
Package
Name
SO8
Description
plastic small outline package; 8 leads;
body width 3.9 mm
Version
SOT96-1
SOT505-1
Type number
PCA9507D
PCA9507DP
[1]
TSSOP8
[1]
plastic thin shrink small outline package;
8 leads; body width 3 mm
Also known as MSOP8.
4. Functional diagram
V
CC(A)
V
CC(A)
DYNAMIC
PULL-UP
SDAA
V
CC(A)
DYNAMIC
PULL-UP
SCLA
V
CC(B)
SCLB
SDAB
V
CC(B)
PCA9507
GND
100 kΩ
EN
002aad401
Fig 1.
PCA9507_1
Functional diagram of PCA9507
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 7 February 2008
2 of 20
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I
2
C-bus and SMBus
5. Pinning information
5.1 Pinning
V
CC(A)
SCLA
SDAA
GND
1
2
8
7
V
CC(B)
SCLB
SDAB
EN
V
CC(A)
SCLA
SDAA
GND
1
2
3
4
002aad400
8
7
V
CC(B)
SCLB
SDAB
EN
PCA9507D
3
4
002aad399
6
5
PCA9507DP
6
5
Fig 2.
Pin configuration for SO8
Fig 3.
Pin configuration for TSSOP8
5.2 Pin description
Table 2.
Symbol
V
CC(A)
SCLA
SDAA
GND
EN
SDAB
SCLB
V
CC(B)
Pin description
Pin
1
2
3
4
5
6
7
8
Description
port A supply voltage (2.7 V to 5.5 V)
serial clock port A bus with rise time accelerator for DDC line or cable,
5 V tolerant
serial data port A bus with rise time accelerator for DDC line or cable,
5 V tolerant
supply ground (0 V)
active HIGH buffer enable input
serial data port B bus with static level offset, 5 V tolerant
serial clock port B bus with static level offset, 5 V tolerant
port B supply voltage (2.7 V to 5.5 V)
6. Functional description
Refer to
Figure 1 “Functional diagram of PCA9507”.
The PCA9507 consists of a pair of bidirectional open-drain I/Os specifically designed to
support up-translation/down-translation between low voltages (as low as 2.7 V) and a
3.3 V or 5 V I
2
C-bus and SMBus. The device contains a rise time accelerator on port A
that enables the device to drive a long cable or a heavier capacitive load for DDC, I
2
C-bus
and SMBus applications. With dual supply rails, the device translates from voltage ranges
2.7 V to 5.5 V down to a voltage as low as 2.7 V without degradation of system
performance. All I/Os are overvoltage tolerant to 5.5 V even when the device is
un-powered (V
CC(B)
and/or V
CC(A)
= 0 V).
The PCA9507 includes a power-up circuit that keeps the output drivers turned off until
V
CC(A)
and V
CC(B)
rise above 2.7 V. V
CC(A)
and V
CC(B)
can be applied in any sequence at
power-up.
PCA9507_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 7 February 2008
3 of 20
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I
2
C-bus and SMBus
V
CC(B)
port B
0.3V
CC(B)
0.4 V
0.5 V
0V
V
CC(A)
port A
0.3V
CC(A)
0V
002aad435
0.7V
CC(A)
Fig 4.
Port A and port B I/O levels
When port B falls first and goes below 0.3V
CC(B)
the port A driver is turned on and port A
pulls down to 0 V. As port A falls below 0.3V
CC(A)
the port B pull-down pulls port B down to
about 0.5 V. Port B falls below 0.4 V because it is not possible to know who is driving the
port A LOW, so the PCA9507 direction control assumes that port A is controlling the part
unless port B falls below 0.4 V. When the port B voltage is
≤
0.4 V the port A driver of the
PCA9507 is on and holds port A down nearly 0 V. As the port B voltage rises because the
external driver turns off, the port B voltage rises up to ~0.5 V because port A is LOW;
once port B rises to ~0.5 V the port A pull-down driver turns off. Then port A rises with a
rise time determined by the RC of port A when it crosses the port A threshold ~0.3V
CC(A)
the port B driver is turned off and the rising edge accelerator is turned on, which causes a
faster rising edge until it reaches the turn-off point for the rising edge accelerator
~0.7V
CC(A)
. Then it continues to rise at the slower rate determined by the RC of port A.
When the port B driver turns off, port B rises with the RC of port B.
V
CC(A)
powers the port A I/Os and the 0.3V
CC(A)
reference for port A as well as the port A
power good detect circuit. V
CC(B)
powers the rest of the chip including the port B I/Os and
the support functions.
Figure 4
illustrates the threshold and I/O levels for port A and
port B.
6.1 Enable
The EN pin is active HIGH with an internal ~100 kΩ pull-up to V
CC(B)
and allows the user
to select when the buffer is active. This can be used to isolate the line when the HDMI
DDC transmitter or receiver is not ready, or from a badly behaved slave on power-up until
after the system power-up reset. It should never change state during an I
2
C-bus operation
because disabling during a bus operation will hang the bus and enabling part way through
a bus cycle could confuse the I
2
C-bus parts being enabled. The enable pin should only
change state when the global bus and the buffer port are in an idle state to prevent system
failures.
6.2 Rise time accelerators
PCA9507 has rise time accelerators on port A only. During port A positive bus transitions
a current source is switched on to quickly slew the SDAA and SCLA lines HIGH once the
input level of 0.3V
CC(A)
is exceeded for the PCA9507 and turns off as the 0.7V
CC(A)
voltage is approached.
PCA9507_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 7 February 2008
4 of 20
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I
2
C-bus and SMBus
6.3 Resistor pull-up value selection
6.3.1 Port A (SDAA and SCLA)
SDAA and SCLA are open-drain I/O that have rise time accelerators and strong pull-down.
When the inputs transition above 0.3V
CC(A)
, the rise time accelerator activates and boosts
the pull-up current during rising edge to meet the I
2
C-bus rise time specification when the
device drives a long cable or heavier capacitance load. The strong pull-down enables the
output to drive to nearly zero voltage for logic LOW. The selection for pull-up resistors are
defined in the HDMI DDC specification shown in
Table 3.
For HDMI transmitter
applications like digital video player, recorder, or set-top box, the pull-up resistor is in the
range of 1.5 kΩ to 2 kΩ. For HDMI receiver applications like in LCD TV or video card, the
pull-up resistor is 47 kΩ on the SCLA line, and there is no pull-up on the SDAA line.
Please refer to
Table 3, Figure 7
and
Figure 8
for more details.
Figure 5
shows the port A
pull-up resistor values (in kΩ) versus capacitance load (in nF) for 5 V supply voltage
complied with 1
µs
rise time per I
2
C-bus Standard-mode specification. The graph
contrasts a shaded and unshaded region. Any resistor value chosen within the unshaded
region would comply with 1
µs
rise time, while any value chosen in the shaded region
would not.
Table 3.
Pin
SDAA
SCLA
HDMI DDC pull-up resistors specification
Where
at the source (DVD/STB)
at the sink (LCD TV)
at the source (DVD/STB)
at the sink (LCD TV)
Minimum
1.5 kΩ
-
1.5 kΩ
Maximum
2.0 kΩ
-
2.0 kΩ
47 kΩ
±
10 %
10.5
R
PU
(kΩ)
8.5
002aad620
6.5
does not comply with
1
µs
rise time
4.5
complies with
1
µs
rise time
2.5
0.5
0
1.0
2.0
3.0
C
L
(nF)
4.0
rise time = 1
µs;
V
CC(A)
= 5 V
Fig 5.
SDAA/SCLA line pull-up resistor versus load capacitance
PCA9507_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 7 February 2008
5 of 20
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