EEWORLDEEWORLDEEWORLD

Part Number

Search

74LVC240APW/AUJ

Description
Buffers and Line DriversOctal bufferlinedrvr 5V inputs/outputs
Categorysemiconductor    Logic integrated circuit    Buffer and line drives   
File Size803KB,18 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
Download Datasheet Parametric View All

74LVC240APW/AUJ Overview

Buffers and Line DriversOctal bufferlinedrvr 5V inputs/outputs

74LVC240APW/AUJ Parametric

Parameter NameAttribute value
MakerNexperia
Product CategoryBuffers and Line Drivers
Enter the number of lines8 Input
Number of output lines8 Output
Supply voltage - max.3.6 V
Supply voltage - min.1.2 V
Minimum operating temperature- 40 C
Maximum operating temperature+ 125 C
Installation styleSMD/SMT
Package/boxTSSOP-20
EncapsulationCut Tape
EncapsulationMouseReel
EncapsulationReel
Output type3-State
logic series74LVC
logical typeCMOS, LVTTL
Number of channels8
Working power current40 uA
Pd-power dissipation500 mW (1/2 W)
propagation delay time16 ns
Factory packaging quantity2500
unit weight191 mg
74LVC240A
Octal buffer/line driver with 5 V tolerant inputs/outputs;
inverting; 3-state
Rev. 8 — 29 November 2011
Product data sheet
1. General description
The 74LVC240A is an octal inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes
the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs
makes the circuit highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V or 5 V applications.
The 74LVC240A is functionally identical to the 74LVC244A except that the 244 has
non-inverting outputs.
2. Features and benefits
5 V tolerant inputs for interlacing with 5 V logic
Supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
High-impedance when V
CC
= 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2526  1494  1950  1939  2729  51  31  40  55  18 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号