dsPIC33FJ32GS406-50I/PT datasheet, PDF

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dsPIC33FJ32GS406-50I/PT: DescriptionIC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，463 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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dsPIC33FJ32GS406-50I/PT Overview

IC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC

dsPIC33FJ32GS406-50I/PT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	1923382257
package instruction	TFQFP, TQFP64,.47SQ
Reach Compliance Code	compliant
Country Of Origin	Thailand
ECCN code	3A991.A.2
Factory Lead Time	52 weeks
YTEOL	5.9
Has ADC	YES
Address bus width
barrel shifter	YES
bit size	16
boundary scan	YES
maximum clock frequency	50 MHz
DAC channel	NO
DMA channel	NO
External data bus width
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PQFP-G64
JESD-609 code	e3
length	10 mm
low power mode	YES
Number of DMA channels	4
Number of external interrupt devices	5
Number of I/O lines	58
Number of serial I/Os	2
Number of terminals	64
Number of timers	7
On-chip data RAM width	8
On-chip program ROM width	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	TFQFP
Encapsulate equivalent code	TQFP64,.47SQ
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH
power supply	3.3 V
Certification status	Not Qualified
RAM (number of words)	4096
ROM programmability	FLASH
Filter level	TS 16949
Maximum seat height	1.2 mm
speed	50 MHz
Maximum slew rate	170 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	10 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER

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dsPIC33FJ32GS406/606/608/610 and

dsPIC33FJ64GS406/606/608/610

16-Bit Digital Signal Controllers with High-Speed PWM,

ADC and Comparators

Operating Conditions

• 3.0V to 3.6V, -40ºC to +85ºC, DC to 50 MIPS

• 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS

Timers/Output Compare/Input Capture

• Six General Purpose Timers:

- Five 16-bit and up to two 32-bit timers/counters

• Four Output Compare (OC) modules Configurable as

Timers/Counters

• Quadrature Encoder Interface (QEI) module

Configurable as Timer/Counter

• Four Input Capture (IC) modules

Core: 16-Bit dsPIC33F

•

Code-Efficient (C and Assembly) Architecture

Two 40-Bit Wide Accumulators

Single-Cycle (MAC/MPY) with Dual Data Fetch

Single-Cycle Mixed-Sign MUL plus Hardware Divide

32-Bit Multiply Support

Communication Interfaces

• Two UART modules (12.5 Mbps):

- With support for LIN/J2602 2.0 protocols and IrDA

• Two 4-Wire SPI modules (15 Mbps)

• ECAN™ module (1 Mbaud) with ECAN 2.0B Support

• Two I

C™ modules (up to 1 Mbaud) with SMBus

Support

Clock Management

•

±1% Internal Oscillator

Programmable PLLs and Oscillator Clock Sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast Wake-up and Start-up

Direct Memory Access (DMA)

• 4-Channel DMA with User-Selectable Priority

Arbitration

• UART, SPI, ECAN, IC, OC and Timers

Power Management

•

Low-Power Management modes (Sleep, Idle, Doze)

Integrated Power-on Reset and Brown-out Reset

1.7 mA/MHz Dynamic Current (typical)

50 µA I

Current (typical)

Input/Output

• Sink/Source 18 mA on 18 Pins, 10 mA on 1 Pin or

6 mA on 66 Pins

• 5V Tolerant Pins

• Selectable Open-Drain and Pull-ups

• 29 External Interrupts

High-Speed PWM

Up to 9 PWM Pairs with Independent Timing

Dead Time for Rising and Falling Edges

1.04 ns PWM Resolution

PWM Support for:

- DC/DC, AC/DC, Inverters, PFC, Lighting

- BLDC, PMSM, ACIM, SRM

• Programmable Fault Inputs

• Flexible Trigger Configurations for ADC Conversions

•

Qualification and Class B Support

• AEC-Q100 REVG (Grade 1, -40ºC to +125ºC)

• Class B Safety Library, IEC 60730, VDE Certified

Advanced Analog Features

• High-Speed ADC module:

- 10-bit resolution with up to two Successive

Approximation Register (SAR) converters

(up to 4 Msps)

- Up to 24 input channels grouped into

12 conversion pairs plus two voltage reference

monitoring inputs

- Dedicated result buffer for each analog channel

• Flexible and Independent ADC Trigger Sources

• Up to 4 High-Speed Comparators with Direct

Connection to the PWM module:

- 10-bit Digital-to-Analog Converter (DAC) for each

comparator

- DAC reference output

- Programmable references with 1024 voltage points

Debugger Development Support

•

In-Circuit and In-Application Programming

Two Program and Two Complex Data Breakpoints

IEEE 1149.2 Compatible (JTAG) Boundary Scan

Trace and Run-Time Watch



2009-2014 Microchip Technology Inc.

DS7000591F-page 1

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